On Fri, 24 Oct 2025 at 18:59, Alex Deucher <[email protected]> wrote: > > On Fri, Oct 24, 2025 at 12:21 PM Mario Limonciello > <[email protected]> wrote: > > > > [Why] > > An `.notify_rlc_state` callback and wrappers for it were introduced > > to support notifying the PMFW that the system is about to suspend. > > > > There are already callbacks for `set_mp1_state` which get called at > > suspend though from `amdgpu_device_ip_suspend_phase2`. > > This won't work. PMFW needs to be notified that RLC is being turned > off before the driver turns it off. I think the call in > amdgpu_device_suspend() is superfluous (but someone should check S3), > but the important one is in smu_disable_dpms() since that is called > right before we stop rlc. I think something like the attached patches > should do the trick. > > Alex
S3 on the OLED works with the three lines in amdgpu_device_suspend removed. > > > > [How] > > Tear out all the notify_rlc_state callbacks and instead move the > > Van Gogh specific code to a `set_mp1_state` callback. > > > > Cc: Robert Beckett <[email protected]> > > Cc: Antheas Kapenekakis <[email protected]> > > Signed-off-by: Mario Limonciello <[email protected]> > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ---- > > .../gpu/drm/amd/include/kgd_pp_interface.h | 1 - > > drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 18 ------------------ > > drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 -- > > drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ---------- > > drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 ----- > > .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 ++++++++++++++++++- > > drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 1 - > > 8 files changed, 18 insertions(+), 42 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > index 3ffb9bb1ec0b..4dbdcb7b11e9 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > @@ -5281,10 +5281,6 @@ int amdgpu_device_suspend(struct drm_device *dev, > > bool notify_clients) > > if (amdgpu_sriov_vf(adev)) > > amdgpu_virt_release_full_gpu(adev, false); > > > > - r = amdgpu_dpm_notify_rlc_state(adev, false); > > - if (r) > > - return r; > > - > > return 0; > > } > > > > diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h > > b/drivers/gpu/drm/amd/include/kgd_pp_interface.h > > index 87814c2b526e..48846a3e4b7b 100644 > > --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h > > +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h > > @@ -523,7 +523,6 @@ struct amd_pm_funcs { > > struct dpm_clocks *clock_table); > > int (*get_smu_prv_buf_details)(void *handle, void **addr, size_t > > *size); > > void (*pm_compute_clocks)(void *handle); > > - int (*notify_rlc_state)(void *handle, bool en); > > }; > > > > struct metrics_table_header { > > diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > > b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > > index 5d08dc3b7110..5c4d0eb198c4 100644 > > --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > > +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > > @@ -195,24 +195,6 @@ int amdgpu_dpm_set_mp1_state(struct amdgpu_device > > *adev, > > return ret; > > } > > > > -int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en) > > -{ > > - int ret = 0; > > - const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; > > - > > - if (pp_funcs && pp_funcs->notify_rlc_state) { > > - mutex_lock(&adev->pm.mutex); > > - > > - ret = pp_funcs->notify_rlc_state( > > - adev->powerplay.pp_handle, > > - en); > > - > > - mutex_unlock(&adev->pm.mutex); > > - } > > - > > - return ret; > > -} > > - > > int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev) > > { > > const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; > > diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > > b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > > index 3bce74f8bb0a..c7ea29385682 100644 > > --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > > +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > > @@ -424,8 +424,6 @@ int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev); > > int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev, > > enum pp_mp1_state mp1_state); > > > > -int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en); > > - > > int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev); > > > > int amdgpu_dpm_baco_exit(struct amdgpu_device *adev); > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > > b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > > index 4317da6f7c38..10d42267085b 100644 > > --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > > +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > > @@ -2072,16 +2072,6 @@ static int smu_disable_dpms(struct smu_context *smu) > > } > > } > > > > - /* Notify SMU RLC is going to be off, stop RLC and SMU interaction. > > - * otherwise SMU will hang while interacting with RLC if RLC is > > halted > > - * this is a WA for Vangogh asic which fix the SMU hang issue. > > - */ > > - ret = smu_notify_rlc_state(smu, false); > > - if (ret) { > > - dev_err(adev->dev, "Fail to notify rlc status!\n"); > > - return ret; > > - } > > - > > if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(9, 4, 2) && > > !((adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs) && > > !amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->stop) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > > b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > > index c48028abc8c4..361e09f20ead 100644 > > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > > @@ -1496,11 +1496,6 @@ struct pptable_funcs { > > */ > > int (*set_mall_enable)(struct smu_context *smu); > > > > - /** > > - * @notify_rlc_state: Notify RLC power state to SMU. > > - */ > > - int (*notify_rlc_state)(struct smu_context *smu, bool en); > > - > > /** > > * @is_asic_wbrf_supported: check whether PMFW supports the wbrf > > feature > > */ > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > > b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > > index 53579208cffb..3dc1919b8c64 100644 > > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > > @@ -2208,6 +2208,23 @@ static int vangogh_notify_rlc_state(struct > > smu_context *smu, bool en) > > return ret; > > } > > > > +static int vangogh_set_mp1_state(struct smu_context *smu, > > + enum pp_mp1_state mp1_state) > > +{ > > + int ret; > > + > > + switch (mp1_state) { > > + case PP_MP1_STATE_UNLOAD: > > + ret = vangogh_notify_rlc_state(smu, false); > > + break; > > + default: > > + /* Ignore others */ > > + ret = 0; > > + } > > + > > + return ret; > > +} > > + > > static int vangogh_post_smu_init(struct smu_context *smu) > > { > > struct amdgpu_device *adev = smu->adev; > > @@ -2524,7 +2541,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = > > { > > .print_clk_levels = vangogh_common_print_clk_levels, > > .set_default_dpm_table = vangogh_set_default_dpm_tables, > > .set_fine_grain_gfx_freq_parameters = > > vangogh_set_fine_grain_gfx_freq_parameters, > > - .notify_rlc_state = vangogh_notify_rlc_state, > > + .set_mp1_state = vangogh_set_mp1_state, > > .feature_is_enabled = smu_cmn_feature_is_enabled, > > .set_power_profile_mode = vangogh_set_power_profile_mode, > > .get_power_profile_mode = vangogh_get_power_profile_mode, > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h > > b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h > > index c09ecf1a68a0..b9976313e741 100644 > > --- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h > > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h > > @@ -96,7 +96,6 @@ > > #define smu_get_default_config_table_settings(smu, config_table) > > smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, > > config_table) > > #define smu_set_config_table(smu, config_table) > > smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table) > > #define smu_init_pptable_microcode(smu) > > smu_ppt_funcs(init_pptable_microcode, 0, smu) > > -#define smu_notify_rlc_state(smu, en) > > smu_ppt_funcs(notify_rlc_state, 0, smu, en) > > #define smu_is_asic_wbrf_supported(smu) > > smu_ppt_funcs(is_asic_wbrf_supported, false, smu) > > #define smu_enable_uclk_shadow(smu, enable) > > smu_ppt_funcs(enable_uclk_shadow, 0, smu, enable) > > #define smu_set_wbrf_exclusion_ranges(smu, freq_band_range) > > smu_ppt_funcs(set_wbrf_exclusion_ranges, -EOPNOTSUPP, smu, freq_band_range) > > -- > > 2.49.0 > >
