The userq TLB flush should be performed after
the vm update complete and input fence signal.

Signed-off-by: Prike Liang <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c    | 5 +++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
index a8bb3f1b8649..01707d72d982 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
@@ -384,6 +384,7 @@ amdgpu_userq_wait_for_last_fence(struct amdgpu_userq_mgr 
*uq_mgr,
                        return -ETIME;
                }
        }
+       amdgpu_gmc_flush_gpu_tlb_pasid(uq_mgr->adev, queue->vm->pasid, 2, true, 
0);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 48a64d828eb8..1537f0b6b712 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1062,7 +1062,8 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params 
*params,
        }
 
        /* Prepare a TLB flush fence to be attached to PTs */
-       if (!params->unlocked && vm->is_compute_context) {
+       if (!params->unlocked && (vm->is_compute_context ||
+            vm->is_userq_context)) {
                amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
 
                /* Makes sure no PD/PT is freed before the flush */
@@ -2792,7 +2793,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
        amdgpu_bo_unreserve(root);
        amdgpu_bo_unref(&root);
        WARN_ON(vm->root.bo);
-
+       amdgpu_gmc_flush_gpu_tlb_pasid(adev, vm->pasid, 2, true, 0);
        amdgpu_vm_fini_entities(vm);
 
        if (!RB_EMPTY_ROOT(&vm->va.rb_root)) {
-- 
2.34.1

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