[PATCH] drm/amdgpu: Add sriov vf check for VCN per queue reset support.

[Shikang Fan]

Add SRIOV check when setting VCN ring's supported reset mask.

Signed-off-by: Shikang Fan <shikang....@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index eacf4e93ba2f..cb7123ec1a5d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -141,7 +141,7 @@ static int vcn_v4_0_3_late_init(struct amdgpu_ip_block 
*ip_block)
        adev->vcn.supported_reset =
                amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
 
-       if (amdgpu_dpm_reset_vcn_is_supported(adev))
+       if (amdgpu_dpm_reset_vcn_is_supported(adev) && !amdgpu_sriov_vf(adev))
                adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
 
        return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index 714350cabf2f..8bd457dea4cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -122,7 +122,9 @@ static int vcn_v5_0_1_late_init(struct amdgpu_ip_block 
*ip_block)
 
        switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
        case IP_VERSION(13, 0, 12):
-               if ((adev->psp.sos.fw_version >= 0x00450025) && 
amdgpu_dpm_reset_vcn_is_supported(adev))
+               if ((adev->psp.sos.fw_version >= 0x00450025) &&
+                       amdgpu_dpm_reset_vcn_is_supported(adev) &&
+                       !amdgpu_sriov_vf(adev))
                        adev->vcn.supported_reset |= 
AMDGPU_RESET_TYPE_PER_QUEUE;
                break;
        default:
-- 
2.34.1