Re: [PATCH v5 5/6] drm/amdgpu: Add helper to alloc GART entries

[Philip Yang]

On 2025-12-10 07:57, Pierre-Eric Pelloux-Prayer wrote:

Hi,

Le 10/12/2025 à 00:43, Philip Yang a écrit :

Add helper amdgpu_gtt_mgr_alloc/free_entries, export the configurable drm_mm

allocator parameters to caller.

Signed-off-by: Philip Yang <philip.y...@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 27 +++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h     |  7 ++++++
  2 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

index 895c1e4c6747..d21c7187e4aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

@@ -321,3 +321,30 @@ void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev)

      ttm_resource_manager_cleanup(man);
      ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, NULL);
  }
+
+int amdgpu_gtt_mgr_alloc_entries(struct amdgpu_gtt_mgr *mgr,
+                 struct drm_mm_node *node,
+                 u64 num_pages, u64 alignment,

I would drop the alignment argument since all users are going to pass 0 for now.

ok, we only need page align for GART address

+                 unsigned long color,

As discussed offline, my version of these helpers also exposed the color arg to be able to distinguish between node's with a BO (color = 0) and the ones without a BO (color = 1). This is useful in amdgpu_gtt_mgr_recover() because for the latter we can't do:

   struct drm_range_mgr_node *node = container_of(mm_node, ...);

To avoid modifying again the same code, I'd suggest to:

1) add a define ("#define GART_ENTRY_WITOUT_BO_COLOR 1" ?) and use it as the color inside your helper

2) remove the color argument
3) update amdgpu_gtt_mgr_recover() to skip nodes with this color

I will make the changes in next version.

Thanks,
Philip

Thanks,
Pierre-Eric

+                 enum drm_mm_insert_mode mode)
+{

+    struct amdgpu_device *adev = container_of(mgr, typeof(*adev), mman.gtt_mgr);

+    int r;
+
+    spin_lock(&mgr->lock);
+    r = drm_mm_insert_node_in_range(&mgr->mm, node, num_pages,
+                    alignment, color, 0,
+                    adev->gmc.gart_size >> PAGE_SHIFT,
+                    mode);
+    spin_unlock(&mgr->lock);
+    return r;
+}
+
+void amdgpu_gtt_mgr_free_entries(struct amdgpu_gtt_mgr *mgr,
+                 struct drm_mm_node *mm_node)
+{
+    spin_lock(&mgr->lock);
+    if (drm_mm_node_allocated(mm_node))
+        drm_mm_remove_node(mm_node);
+    spin_unlock(&mgr->lock);
+}

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

index 72488124aa59..28511e66d364 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

@@ -141,6 +141,13 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);

  bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
  void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
  +int amdgpu_gtt_mgr_alloc_entries(struct amdgpu_gtt_mgr *mgr,
+                 struct drm_mm_node *node,
+                 u64 num_pages, u64 alignment,
+                 unsigned long color,
+                 enum drm_mm_insert_mode mode);
+void amdgpu_gtt_mgr_free_entries(struct amdgpu_gtt_mgr *mgr,
+                 struct drm_mm_node *mm_node);
  uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
    u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);