Re: [PATCH v2 2/2] drm/amd/pm: force send pcie parmater on navi1x

[Lazar, Lijo]

On 15-Dec-25 4:16 PM, Yang Wang wrote:

v1:
the PMFW didn't initialize the PCIe DPM parameters
and requires the KMD to actively provide these parameters.

v2:
clean & remove unused code logic (lijo)

Fixes: 1a18607c07bb ("drm/amd/pm: override pcie dpm parameters only if it is 
necessary")

Signed-off-by: Yang Wang <kevinyang.w...@amd.com>
---
  .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 33 +++++++++----------
  1 file changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 0c26fe6fb949..4896200a0bd9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2207,24 +2207,21 @@ static int navi10_update_pcie_parameters(struct 
smu_context *smu,
        dpm_context->dpm_tables.pcie_table.lclk_levels = NUM_LINK_LEVELS;

for (i = 0; i < NUM_LINK_LEVELS; i++) {

-               if (pptable->PcieGenSpeed[i] > pcie_gen_cap ||
-                       pptable->PcieLaneCount[i] > pcie_width_cap) {
-                       dpm_context->dpm_tables.pcie_table.pcie_gen[i] =
-                                                                       
pptable->PcieGenSpeed[i] > pcie_gen_cap ?
-                                                                       
pcie_gen_cap : pptable->PcieGenSpeed[i];
-                       dpm_context->dpm_tables.pcie_table.pcie_lane[i] =
-                                                                       
pptable->PcieLaneCount[i] > pcie_width_cap ?
-                                                                       
pcie_width_cap : pptable->PcieLaneCount[i];
-                       smu_pcie_arg = i << 16;
-                       smu_pcie_arg |= 
dpm_context->dpm_tables.pcie_table.pcie_gen[i] << 8;
-                       smu_pcie_arg |= 
dpm_context->dpm_tables.pcie_table.pcie_lane[i];
-                       ret = smu_cmn_send_smc_msg_with_param(smu,
-                                                       
SMU_MSG_OverridePcieParameters,
-                                                       smu_pcie_arg,
-                                                       NULL);
-                       if (ret)
-                               break;
-               }
+               dpm_context->dpm_tables.pcie_table.pcie_gen[i] =
+                       pptable->PcieGenSpeed[i] > pcie_gen_cap ?
+                       pcie_gen_cap : pptable->PcieGenSpeed[i];

Use of min() would have simplified this and below one a bit.

Reviewed-by: Lijo Lazar <lijo.la...@amd.com>

Thanks,
Lijo

+               dpm_context->dpm_tables.pcie_table.pcie_lane[i] =
+                       pptable->PcieLaneCount[i] > pcie_width_cap ?
+                       pcie_width_cap : pptable->PcieLaneCount[i];
+               smu_pcie_arg = i << 16;
+               smu_pcie_arg |= dpm_context->dpm_tables.pcie_table.pcie_gen[i] 
<< 8;
+               smu_pcie_arg |= dpm_context->dpm_tables.pcie_table.pcie_lane[i];
+               ret = smu_cmn_send_smc_msg_with_param(smu,
+                                                     
SMU_MSG_OverridePcieParameters,
+                                                     smu_pcie_arg,
+                                                     NULL);
+               if (ret)
+                       return ret;
        }

return ret;