[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Alex Deucher <[email protected]>
> -----Original Message----- > From: amd-gfx <[email protected]> On Behalf Of Alex > Deucher > Sent: Wednesday, January 28, 2026 6:55 AM > To: Deucher, Alexander <[email protected]> > Cc: [email protected] > Subject: Re: [PATCH] drm/amdgpu/soc21: fix xclk for APUs > > Ping? > > On Fri, Jan 23, 2026 at 2:22 PM Alex Deucher <[email protected]> > wrote: > > > > The reference clock is supposed to be 100Mhz, but it appears to > > actually be slightly lower (99.81Mhz). > > > > Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14451 > > Signed-off-by: Alex Deucher <[email protected]> > > --- > > drivers/gpu/drm/amd/amdgpu/soc21.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c > > b/drivers/gpu/drm/amd/amdgpu/soc21.c > > index 2da733b45c21a..d9cc649d81ad4 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/soc21.c > > +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c > > @@ -256,7 +256,13 @@ static u32 soc21_get_config_memsize(struct > > amdgpu_device *adev) > > > > static u32 soc21_get_xclk(struct amdgpu_device *adev) { > > - return adev->clock.spll.reference_freq; > > + u32 reference_clock = adev->clock.spll.reference_freq; > > + > > + /* reference clock is actually 99.81 Mhz rather than 100 Mhz */ > > + if ((adev->flags & AMD_IS_APU) && reference_clock == 10000) > > + return 9981; > > + > > + return reference_clock; > > } > > > > > > -- > > 2.52.0 > >
