Adjust SDMA 5.2 per-queue reset firmware version thresholds to match the correct requirements for different ASICs: 5.2.0: Require fw >=34 5.2.2: Require fw >=41 5.2.3: Require fw >=9 5.2.4: Require fw >=33 (from 76) 5.2.5: Require fw >=1 (from 34)
Signed-off-by: Jesse.Zhang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 5aa500fe554b..78dda51cd9e0 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -1350,16 +1350,31 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block) amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring); switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { case IP_VERSION(5, 2, 0): + if ((adev->sdma.instance[0].fw_version >= 34) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; case IP_VERSION(5, 2, 2): + if ((adev->sdma.instance[0].fw_version >= 41) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; case IP_VERSION(5, 2, 3): + if ((adev->sdma.instance[0].fw_version >= 9) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; case IP_VERSION(5, 2, 4): - if ((adev->sdma.instance[0].fw_version >= 76) && + if ((adev->sdma.instance[0].fw_version >= 33) && !amdgpu_sriov_vf(adev) && !adev->debug_disable_gpu_ring_reset) adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; break; case IP_VERSION(5, 2, 5): - if ((adev->sdma.instance[0].fw_version >= 34) && + if ((adev->sdma.instance[0].fw_version >= 1) && !amdgpu_sriov_vf(adev) && !adev->debug_disable_gpu_ring_reset) adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; -- 2.49.0
