Not supported on SMU 15_0_0 Signed-off-by: Pratik Vishwakarma <[email protected]> --- .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c | 13 ------------- 1 file changed, 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c index 2fa55f22bb94..6eb8a733d09e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c @@ -58,19 +58,6 @@ #define mmMP1_SMN_C2PMSG_34 0x0062 #define mmMP1_SMN_C2PMSG_34_BASE_IDX 1 -/* MALLPowerController message arguments (Defines for the Cache mode control) */ -#define SMU_MALL_PMFW_CONTROL 0 -#define SMU_MALL_DRIVER_CONTROL 1 - -/* - * MALLPowerState message arguments - * (Defines for the Allocate/Release Cache mode if in driver mode) - */ -#define SMU_MALL_EXIT_PG 0 -#define SMU_MALL_ENTER_PG 1 - -#define SMU_MALL_PG_CONFIG_DEFAULT SMU_MALL_PG_CONFIG_DRIVER_CONTROL_ALWAYS_ON - #define SMU_15_0_UMD_PSTATE_GFXCLK 700 #define SMU_15_0_UMD_PSTATE_SOCCLK 678 #define SMU_15_0_UMD_PSTATE_FCLK 1800 -- 2.43.0
