[PATCH v2 11/11] drm/amd/smu: Fix User mode stable P-states SMU15

[Pratik Vishwakarma]

SMU 15_0_0 exports only soft limits for CLKs
Use correct messages

Signed-off-by: Pratik Vishwakarma <pratik.vishwaka...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c  | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c
index 140e5b8c0489..8e6b7574d159 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c
@@ -1033,26 +1033,21 @@ static int 
smu_v15_0_0_set_soft_freq_limited_range(struct smu_context *smu,
        switch (clk_type) {
        case SMU_GFXCLK:
        case SMU_SCLK:
-               msg_set_min = SMU_MSG_SetHardMinGfxClk;
+               msg_set_min = SMU_MSG_SetSoftMinGfxclk;
                msg_set_max = SMU_MSG_SetSoftMaxGfxClk;
                break;
        case SMU_FCLK:
-               msg_set_min = SMU_MSG_SetHardMinFclkByFreq;
+               msg_set_min = SMU_MSG_SetSoftMinFclk;
                msg_set_max = SMU_MSG_SetSoftMaxFclkByFreq;
                break;
        case SMU_SOCCLK:
-               msg_set_min = SMU_MSG_SetHardMinSocclkByFreq;
+               msg_set_min = SMU_MSG_SetSoftMinSocclkByFreq;
                msg_set_max = SMU_MSG_SetSoftMaxSocclkByFreq;
                break;
        case SMU_VCLK:
        case SMU_DCLK:
-               msg_set_min = SMU_MSG_SetHardMinVcn0;
-               msg_set_max = SMU_MSG_SetSoftMaxVcn0;
-               break;
-       case SMU_VCLK1:
-       case SMU_DCLK1:
-               msg_set_min = SMU_MSG_SetHardMinVcn1;
-               msg_set_max = SMU_MSG_SetSoftMaxVcn1;
+               msg_set_min = SMU_MSG_SetSoftMinVcn;
+               msg_set_max = SMU_MSG_SetSoftMaxVcn;
                break;
        default:
                return -EINVAL;
-- 
2.43.0