On 09-Feb-26 10:26 AM, Pratik Vishwakarma wrote:
Add update_table for SMU 15_0_0

Signed-off-by: Pratik Vishwakarma <[email protected]>
---
  drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h  |  5 ++
  .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c    | 60 +++++++++++++++++++
  2 files changed, 65 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
index 14e8d8c7a80a..af87c31ca9a4 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
@@ -241,5 +241,10 @@ int smu_v15_0_enable_thermal_alert(struct smu_context 
*smu);
int smu_v15_0_disable_thermal_alert(struct smu_context *smu); +int smu_v15_0_0_update_table(struct smu_context *smu,
+                        enum smu_table_id table_index,
+                        int argument, void *table_data,
+                        bool drv2smu);
+
  #endif
  #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
index a2854d528bab..fe18af12aaf1 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
@@ -1726,6 +1726,66 @@ int smu_v15_0_set_gfx_power_up_by_imu(struct smu_context 
*smu)
        return ret;
  }
+int smu_v15_0_0_update_table(struct smu_context *smu,
+                        enum smu_table_id table_index,
+                        int argument,
+                        void *table_data,
+                        bool drv2smu)
+{
+       struct smu_table_context *smu_table = &smu->smu_table;
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_table *table = &smu_table->driver_table;
+       int table_id = smu_cmn_to_asic_specific_index(smu,
+                                                     CMN2ASIC_MAPPING_TABLE,
+                                                     table_index);
+       uint64_t address;
+       uint32_t table_size;
+       int ret;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+
+       if (!table_data || table_index >= SMU_TABLE_COUNT || table_id < 0)
+               return -EINVAL;
+
+       table_size = smu_table->tables[table_index].size;
+
+       if (drv2smu) {
+               memcpy(table->cpu_addr, table_data, table_size);
+               /*
+                * Flush hdp cache: to guard the content seen by
+                * GPU is consitent with CPU.
+                */
+               amdgpu_hdp_flush(adev, NULL);
+       }
+
+       address = table->mc_address;
+
+       struct smu_msg_args args = {
+               .msg = drv2smu ?
+                               SMU_MSG_TransferTableDram2Smu :
+                               SMU_MSG_TransferTableSmu2Dram,
+               .num_args = 3,
+               .num_out_args = 0,
+               .flags = SMU_MSG_FLAG_ASYNC | SMU_MSG_FLAG_LOCK_HELD,

These flags are not correct. First one indicates, it's an asynchronous call and this one is not. Second one says caller already holds the mutex which is also incorrect. Just clear all the flags.
+               .timeout = 0,

This is also incorrect, just use the default timeout.

Thanks,
Lijo

+       };
+
+       args.args[0] = table_id;
+       args.args[1] = (uint32_t)lower_32_bits(address);
+       args.args[2] = (uint32_t)upper_32_bits(address);
+
+       ret = ctl->ops->send_msg(ctl, &args);
+
+       if (ret)
+               return ret;
+
+       if (!drv2smu) {
+               amdgpu_hdp_invalidate(adev, NULL);
+               memcpy(table_data, table->cpu_addr, table_size);
+       }
+
+       return 0;
+}
+
  int smu_v15_0_set_default_dpm_tables(struct smu_context *smu)
  {
        struct smu_table_context *smu_table = &smu->smu_table;

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