Add support for psp v13_0_15 ip block

Signed-off-by: Mangesh Gadre <[email protected]>
Reviewed-by: Asad Kamal <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c       |  5 ++++-
 drivers/gpu/drm/amd/amdgpu/psp_v13_0.c        | 15 +++++++++++----
 drivers/gpu/drm/amd/amdgpu/soc15.c            |  3 ++-
 4 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 41e63c286912..0d369462496e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -2164,6 +2164,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct 
amdgpu_device *adev)
        case IP_VERSION(13, 0, 11):
        case IP_VERSION(13, 0, 12):
        case IP_VERSION(13, 0, 14):
+       case IP_VERSION(13, 0, 15):
        case IP_VERSION(14, 0, 0):
        case IP_VERSION(14, 0, 1):
        case IP_VERSION(14, 0, 4):
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 5eeea965032a..a7c7b378c696 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -148,6 +148,7 @@ static int psp_init_sriov_microcode(struct psp_context *psp)
                break;
        case IP_VERSION(13, 0, 6):
        case IP_VERSION(13, 0, 14):
+       case IP_VERSION(13, 0, 15):
                ret = psp_init_cap_microcode(psp, ucode_prefix);
                ret &= psp_init_ta_microcode(psp, ucode_prefix);
                break;
@@ -219,6 +220,7 @@ static int psp_early_init(struct amdgpu_ip_block *ip_block)
                psp->autoload_supported = false;
                break;
        case IP_VERSION(13, 0, 12):
+       case IP_VERSION(13, 0, 15):
                psp_v13_0_set_psp_funcs(psp);
                psp->autoload_supported = false;
                adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev);
@@ -383,7 +385,8 @@ static bool psp_get_runtime_db_entry(struct amdgpu_device 
*adev,
 
        if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
            amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
-           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))
+           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
+               amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15))
                return false;
 
        db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET;
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c 
b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index af4a7d7c4abd..d1e1a4369521 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
@@ -57,6 +57,8 @@ MODULE_FIRMWARE("amdgpu/psp_13_0_12_sos.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_12_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_14_sos.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_14_ta.bin");
+MODULE_FIRMWARE("amdgpu/psp_13_0_15_sos.bin");
+MODULE_FIRMWARE("amdgpu/psp_13_0_15_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_14_0_0_toc.bin");
 MODULE_FIRMWARE("amdgpu/psp_14_0_0_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_14_0_1_toc.bin");
@@ -121,6 +123,7 @@ static int psp_v13_0_init_microcode(struct psp_context *psp)
        case IP_VERSION(13, 0, 10):
        case IP_VERSION(13, 0, 12):
        case IP_VERSION(13, 0, 14):
+       case IP_VERSION(13, 0, 15):
                err = psp_init_sos_microcode(psp, ucode_prefix);
                if (err)
                        return err;
@@ -156,7 +159,8 @@ static void psp_v13_0_bootloader_print_status(struct 
psp_context *psp,
 
        if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
            amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
-           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {
+           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
+               amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) {
                at = 0;
                for_each_inst(i, adev->aid_mask) {
                        bl_status_reg =
@@ -202,7 +206,8 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context 
*psp)
        retry_cnt =
                ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) 
||
                  amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) 
||
-                 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 
14))) ?
+                 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) 
||
+                 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 
15))) ?
                        PSP_VMBX_POLLING_LIMIT :
                        10;
        /* Wait for bootloader to signify that it is ready having bit 31 of
@@ -232,7 +237,8 @@ static int 
psp_v13_0_wait_for_bootloader_steady_state(struct psp_context *psp)
 
        if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
            amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
-           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {
+           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
+           amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) {
                ret = psp_v13_0_wait_for_vmbx_ready(psp);
                if (ret)
                        amdgpu_ras_query_boot_status(adev, 4);
@@ -872,7 +878,8 @@ static bool psp_v13_0_get_ras_capability(struct psp_context 
*psp)
 
        if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
             amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
-            amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) &&
+            amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
+                amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) 
&&
            (!(adev->flags & AMD_IS_APU))) {
                reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_127);
                adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 54b14751fd7a..4e037a6978f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1478,7 +1478,8 @@ static void soc15_common_get_clockgating_state(struct 
amdgpu_ip_block *ip_block,
        if ((amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 2)) &&
            (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) &&
            (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 12)) &&
-           (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 14))) {
+           (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 14)) &&
+               (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 
15))) {
                /* AMD_CG_SUPPORT_DRM_MGCG */
                data = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0));
                if (!(data & 0x01000000))
-- 
2.34.1

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