[AMD Official Use Only - AMD Internal Distribution Only] Series is
Reviewed-by: Hawking Zhang <[email protected]> Regards, Hawking -----Original Message----- From: amd-gfx <[email protected]> On Behalf Of Tao Zhou Sent: Thursday, February 26, 2026 16:13 To: [email protected] Cc: Zhou1, Tao <[email protected]> Subject: [PATCH 2/2] drm/amdgpu: clear related counter after RAS eeprom reset Make eeprom data and its counter consistent. Signed-off-by: Tao Zhou <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c index 6fba9d5b29ea..44fba4b6aa92 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c @@ -508,6 +508,9 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control) control->bad_channel_bitmap = 0; amdgpu_dpm_send_hbm_bad_channel_flag(adev, control->bad_channel_bitmap); con->update_channel_flag = false; + /* there is no record on eeprom now, clear the counter */ + if (con->eh_data) + con->eh_data->count_saved = 0; amdgpu_ras_debugfs_set_ret_size(control); -- 2.34.1
