pass queue properties flags at runtime, add new MQD update flag to control performance count enable.
Signed-off-by: James Zhu <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 116e509e7bed..4e9513cbe7f6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -796,6 +796,8 @@ enum amdgpu_mqd_update_flag { AMDGPU_UPDATE_FLAG_DBG_WA_ENABLE = 1, AMDGPU_UPDATE_FLAG_DBG_WA_DISABLE = 2, AMDGPU_UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */ + AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE = 5, + AMDGPU_UPDATE_FLAG_PERFCOUNT_DISABLE = 6, }; struct amdgpu_mqd_prop { diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c index 412c00ecd97f..173fd09b5650 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c @@ -389,6 +389,7 @@ static int amdgpu_userq_set_compute_mqd(struct amdgpu_usermode_queue *queue, props->cu_mask = cu_mask; props->cu_mask_count = count; props->is_user_cu_masked = (cu_mask != NULL); + } /* Parse HQD priority and other compute properties */ @@ -623,6 +624,7 @@ static int mes_userq_mqd_update(struct amdgpu_usermode_queue *queue, struct drm_ userq_props->queue_size = args_in->queue_size; userq_props->hqd_base_gpu_addr = args_in->queue_va; + userq_props->cu_flags = args_in->flags; retval = mqd_hw_default->init_mqd(adev, (void *)queue->mqd.cpu_ptr, userq_props); -- 2.34.1
