This DC patchset brings improvements in multiple areas. In summary, we highlight: * Fixes on compiler warnings * Introduction of NV12/P010 formats to color pipeline * Improvements on reply and DML2 * Enablment on DCN42
Cc: Dan Wheeler <[email protected]> Charlene Liu (1): drm/amd/display: Update underflow detection ChunTao Tso (1): drm/amd/display: Add new types to replay config Clay King (1): drm/amd/display: Clean up unused code Gaghik Khachatrian (2): drm/amd/display: Clean up NULL pointer warnings in dml2 drm/amd/display: Fix compile warnings in dml2_0 Harry Wentland (3): drm/amd/display: Set chroma taps to 1 if luma taps are 1 drm/amd/display: Add NV12/P010 formats to primary plane drm/amd/display: Add COLOR_ENCODING/COLOR_RANGE to overlay planes Ivan Lipski (2): drm/amd/display: Add missing DCCG register entries for DCN20-DCN316 drm/amd/display: Check for S0i3 to be done before DCCG init on DCN21 Nicholas Kazlauskas (2): drm/amd/display: Fix HWSS v3 fast path determination drm/amd/display: Add documentation and cleanup DMUB HW lock manager Ovidiu Bunea (1): drm/amd/display: Add min clock init for DML21 mode programming Peichen Huang (1): drm/amd/display: Return early from vesa replay enable function Roman Li (3): drm/amd/display: Enable dcn42 DC clk_mgr drm/amd/display: Add DML support for dcn42 drm/amd/display: Sync dcn42 with DC 3.2.373 Taimur Hassan (2): drm/amd/display: [FW Promotion] Release 0.1.50.0 drm/amd/display: Promote DC to 3.2.373 Tom Chung (1): drm/amd/display: Add back missing memory type in array Weiguang Li (1): drm/amd/display: Add ESD detection for replay recovery .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 + .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 6 +- .../gpu/drm/amd/display/dc/bios/bios_parser.c | 11 +- .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 16 + .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 1 + .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 301 +++++----- .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 134 ++--- .../gpu/drm/amd/display/dc/core/dc_resource.c | 1 - .../gpu/drm/amd/display/dc/core/dc_stream.c | 41 +- .../gpu/drm/amd/display/dc/core/dc_surface.c | 9 + drivers/gpu/drm/amd/display/dc/dc.h | 61 +- .../gpu/drm/amd/display/dc/dc_bios_types.h | 3 +- drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_plane.h | 1 + .../gpu/drm/amd/display/dc/dc_spl_translate.c | 1 + drivers/gpu/drm/amd/display/dc/dc_trace.h | 4 +- drivers/gpu/drm/amd/display/dc/dc_types.h | 26 + .../amd/display/dc/dccg/dcn20/dcn20_dccg.h | 9 +- .../amd/display/dc/dccg/dcn21/dcn21_dccg.c | 21 +- .../amd/display/dc/dccg/dcn301/dcn301_dccg.h | 8 +- .../amd/display/dc/dccg/dcn31/dcn31_dccg.h | 5 +- .../amd/display/dc/dccg/dcn314/dcn314_dccg.h | 5 +- .../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 20 + .../amd/display/dc/dccg/dcn42/dcn42_dccg.c | 59 +- .../amd/display/dc/dccg/dcn42/dcn42_dccg.h | 11 +- .../drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 16 + .../drm/amd/display/dc/dce/dmub_hw_lock_mgr.h | 31 + .../gpu/drm/amd/display/dc/dml2_0/Makefile | 3 + .../amd/display/dc/dml2_0/display_mode_core.c | 4 +- .../dml2_0/dml21/dml21_translation_helper.c | 56 +- .../dml2_0/dml21/dml21_translation_helper.h | 1 + .../amd/display/dc/dml2_0/dml21/dml21_utils.c | 1 + .../display/dc/dml2_0/dml21/dml21_wrapper.c | 15 +- .../dml21/inc/bounding_boxes/dcn42_soc_bb.h | 263 +++++++++ .../dml21/inc/dml_top_display_cfg_types.h | 13 + .../dc/dml2_0/dml21/inc/dml_top_types.h | 3 + .../dml21/src/dml2_core/dml2_core_dcn4.c | 111 ++++ .../dml21/src/dml2_core/dml2_core_dcn4.h | 1 + .../dml21/src/dml2_core/dml2_core_factory.c | 9 + .../dml21/src/dml2_core/dml2_core_utils.c | 63 +- .../dml21/src/dml2_core/dml2_core_utils.h | 2 + .../dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 33 ++ .../dml21/src/dml2_dpmm/dml2_dpmm_dcn4.h | 1 + .../dml21/src/dml2_dpmm/dml2_dpmm_factory.c | 6 + .../dml2_0/dml21/src/dml2_mcg/dml2_mcg_dcn4.h | 2 +- .../dml21/src/dml2_mcg/dml2_mcg_dcn42.c | 76 +++ .../dml21/src/dml2_mcg/dml2_mcg_dcn42.h | 12 + .../dml21/src/dml2_mcg/dml2_mcg_factory.c | 6 + .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 6 + .../dml21/src/dml2_pmo/dml2_pmo_factory.c | 4 +- .../dml21/src/dml2_pmo/dml2_pmo_factory.h | 2 +- .../dml21/src/dml2_top/dml2_top_interfaces.c | 2 + .../dml21/src/dml2_top/dml2_top_legacy.c | 1 - .../src/inc/dml2_internal_shared_types.h | 3 + .../amd/display/dc/dml2_0/dml2_mall_phantom.c | 41 +- .../drm/amd/display/dc/dml2_0/dml2_wrapper.c | 3 +- .../drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c | 8 +- .../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 8 +- .../amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c | 2 + .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 21 + .../hpo/dcn31/dcn31_hpo_dp_stream_encoder.c | 5 + .../display/dc/hubbub/dcn401/dcn401_hubbub.c | 4 - .../amd/display/dc/hubp/dcn401/dcn401_hubp.c | 201 ++++--- .../amd/display/dc/hubp/dcn401/dcn401_hubp.h | 23 +- .../amd/display/dc/hubp/dcn42/dcn42_hubp.c | 85 ++- .../amd/display/dc/hubp/dcn42/dcn42_hubp.h | 16 +- .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 158 ++--- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 32 +- .../amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 1 - .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 12 +- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 421 +++++-------- .../amd/display/dc/hwss/dcn42/dcn42_hwseq.c | 553 +++--------------- .../amd/display/dc/hwss/dcn42/dcn42_hwseq.h | 10 +- .../amd/display/dc/hwss/dcn42/dcn42_init.c | 8 +- .../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 2 +- .../amd/display/dc/inc/hw/clk_mgr_internal.h | 73 ++- drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 36 +- .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 18 +- drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 112 ++-- drivers/gpu/drm/amd/display/dc/inc/resource.h | 1 + .../drm/amd/display/dc/link/link_detection.c | 12 +- .../dc/link/protocols/link_dp_irq_handler.c | 36 +- .../dc/link/protocols/link_dp_panel_replay.c | 23 +- .../link/protocols/link_edp_panel_control.c | 3 +- .../drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c | 4 +- .../amd/display/dc/mpc/dcn401/dcn401_mpc.c | 177 +++--- .../amd/display/dc/mpc/dcn401/dcn401_mpc.h | 25 +- .../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c | 390 ++---------- .../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h | 50 +- .../amd/display/dc/optc/dcn10/dcn10_optc.h | 8 +- .../amd/display/dc/optc/dcn31/dcn31_optc.c | 2 +- .../amd/display/dc/optc/dcn42/dcn42_optc.c | 105 +++- .../amd/display/dc/optc/dcn42/dcn42_optc.h | 13 +- .../dc/resource/dcn20/dcn20_resource.c | 2 - .../dc/resource/dcn42/dcn42_resource.c | 10 +- .../display/dc/soc_and_ip_translator/Makefile | 3 + .../dcn401/dcn401_soc_and_ip_translator.c | 3 + .../dcn42/dcn42_soc_and_ip_translator.c | 163 +++++- .../dcn42/dcn42_soc_and_ip_translator.h | 1 + .../soc_and_ip_translator.c | 4 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 71 ++- .../gpu/drm/amd/display/include/dpcd_defs.h | 3 + .../include/asic_reg/clk/clk_15_0_0_offset.h | 44 ++ .../include/asic_reg/clk/clk_15_0_0_sh_mask.h | 52 ++ .../include/asic_reg/dcn/dcn_4_2_0_offset.h | 2 + .../include/asic_reg/dcn/dcn_4_2_0_sh_mask.h | 9 + 108 files changed, 2675 insertions(+), 1902 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42_soc_bb.h create mode 100644 drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_mcg/dml2_mcg_dcn42.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_mcg/dml2_mcg_dcn42.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/clk/clk_15_0_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/clk/clk_15_0_0_sh_mask.h -- 2.43.0
