Applied. Thanks! Alex
On Mon, Mar 16, 2026 at 9:34 AM Andy Nguyen <[email protected]> wrote: > > The ASICREV_IS_BEIGE_GOBY_P check always took precedence, because it includes > all chip revisions upto NV_UNKNOWN. > > Fixes: 54b822b3eac3 ("drm/amd/display: Use dce_version instead of chip_id") > Signed-off-by: Andy Nguyen <[email protected]> > --- > drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c > b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c > index 08d0e05a313e..d237d7b41dfd 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c > @@ -255,6 +255,10 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context > *ctx, struct pp_smu_funcs *p > BREAK_TO_DEBUGGER(); > return NULL; > } > + if (ctx->dce_version == DCN_VERSION_2_01) { > + dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); > + return &clk_mgr->base; > + } > if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev)) { > dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); > return &clk_mgr->base; > @@ -267,10 +271,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context > *ctx, struct pp_smu_funcs *p > dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); > return &clk_mgr->base; > } > - if (ctx->dce_version == DCN_VERSION_2_01) { > - dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); > - return &clk_mgr->base; > - } > dcn20_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); > return &clk_mgr->base; > } > -- > 2.43.0 >
