On 18-Mar-26 4:16 PM, Gangliang Xie wrote:
add support to query vram info from firmware
Signed-off-by: Gangliang Xie <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 6 ++++++
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16 ++++++++++------
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 7f4751e5caaf..712b0588a359 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -399,6 +399,9 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device
*adev,
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(12, 0, 0):
case IP_VERSION(12, 0, 1):
+ case IP_VERSION(9, 5, 0):
+ case IP_VERSION(9, 4, 4):
+ case IP_VERSION(9, 4, 3):
index =
get_index_into_master_table(atom_master_list_of_data_tables_v2_1, umc_info);
break;
default:
@@ -475,6 +478,9 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device
*adev,
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(12, 0, 0):
case IP_VERSION(12, 0, 1):
+ case IP_VERSION(9, 5, 0):
+ case IP_VERSION(9, 4, 4):
+ case IP_VERSION(9, 4, 3):
umc_info = (union umc_info
*)(mode_info->atom_context->bios + data_offset);
if (frev == 4) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index e35ed0cc2ec6..02827afaa365 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1806,6 +1806,7 @@ static void gmc_v9_0_save_registers(struct amdgpu_device
*adev)
static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)
{
static const u32 regBIF_BIOS_SCRATCH_4 = 0x50;
+ int dev_var = adev->pdev->device & 0xF;
u32 vram_info;
adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
@@ -1818,6 +1819,10 @@ static void gmc_v9_4_3_init_vram_info(struct
amdgpu_device *adev)
adev->rev_id == 0x3)
adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E;
+ if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &&
+ (dev_var == 0x5))
+ adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E;
+
if (!(adev->flags & AMD_IS_APU) && !amdgpu_sriov_vf(adev)) {
vram_info = RREG32(regBIF_BIOS_SCRATCH_4);
adev->gmc.vram_vendor = vram_info & 0xF;
@@ -1836,9 +1841,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block
*ip_block)
spin_lock_init(&adev->gmc.invalidate_lock);
- if (amdgpu_is_multi_aid(adev)) {
- gmc_v9_4_3_init_vram_info(adev);
- } else if (!adev->bios) {
+ if (!adev->bios) {
if (adev->flags & AMD_IS_APU) {
adev->gmc.vram_type = AMDGPU_VRAM_TYPE_DDR4;
adev->gmc.vram_width = 64 * 64;
Keeping this as the first option doesn't work for MI300A APU. Also this
doesn't work for scenarios where VBIOS image is not available like
passthrough.
Thanks,
Lijo
@@ -1846,9 +1849,8 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block
*ip_block)
adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
adev->gmc.vram_width = 128 * 64;
}
- } else {
- r = amdgpu_atomfirmware_get_vram_info(adev,
- &vram_width, &vram_type, &vram_vendor);
+ } else if (!amdgpu_atomfirmware_get_vram_info(adev,
+ &vram_width, &vram_type, &vram_vendor)) {
if (amdgpu_sriov_vf(adev))
/* For Vega10 SR-IOV, vram_width can't be read from
ATOM as RAVEN,
* and DF related registers is not readable, seems
hardcord is the
@@ -1875,6 +1877,8 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block
*ip_block)
adev->gmc.vram_type = vram_type;
adev->gmc.vram_vendor = vram_vendor;
+ } else if (amdgpu_is_multi_aid(adev)) {
+ gmc_v9_4_3_init_vram_info(adev);
}
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(9, 1, 0):
