Applied. Thanks! Alex
On Wed, Mar 18, 2026 at 4:39 AM Adriano Vero <[email protected]> wrote: > > Signed-off-by: Adriano Vero <[email protected]> > --- > .../src/dml2_core/dml2_core_dcn4_calcs.c | 32 +++++++++---------- > 1 file changed, 16 insertions(+), 16 deletions(-) > > diff --git > a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c > > b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c > index ca5ac3c0d..b7fe4fc92 100644 > --- > a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c > +++ > b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c > @@ -202,7 +202,7 @@ static unsigned int dml_round_to_multiple(unsigned int > num, unsigned int multipl > return (num - remainder); > } > > -static unsigned int dml_get_num_active_pipes(int unsigned num_planes, const > struct core_display_cfg_support_info *cfg_support_info) > +static unsigned int dml_get_num_active_pipes(unsigned int num_planes, const > struct core_display_cfg_support_info *cfg_support_info) > { > unsigned int num_active_pipes = 0; > > @@ -546,9 +546,9 @@ static bool dml_is_vertical_rotation(enum > dml2_rotation_angle Scan) > return is_vert; > } > > -static int unsigned dml_get_gfx_version(enum dml2_swizzle_mode sw_mode) > +static unsigned int dml_get_gfx_version(enum dml2_swizzle_mode sw_mode) > { > - int unsigned version = 0; > + unsigned int version = 0; > > if (sw_mode == dml2_sw_linear || > sw_mode == dml2_sw_256b_2d || > @@ -1761,7 +1761,7 @@ static unsigned int CalculateVMAndRowBytes(struct > dml2_core_shared_calculate_vm_ > *p->PixelPTEBytesPerRow = (unsigned > int)((double)*p->dpte_row_width_ub / (double)*p->PixelPTEReqWidth * > *p->PTERequestSize); > > // VBA_DELTA, VBA doesn't have programming value for pte row > height linear. > - *p->dpte_row_height_linear = (unsigned int)1 << (unsigned > int)math_floor2(math_log((float)(p->PTEBufferSizeInRequests * > PixelPTEReqWidth_linear / p->Pitch), 2.0), 1); > + *p->dpte_row_height_linear = 1U << (unsigned > int)math_floor2(math_log((float)(p->PTEBufferSizeInRequests * > PixelPTEReqWidth_linear / p->Pitch), 2.0), 1); > if (*p->dpte_row_height_linear > 128) > *p->dpte_row_height_linear = 128; > > @@ -3377,7 +3377,7 @@ static void calculate_cursor_req_attributes( > DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_line = %d\n", __func__, > *cursor_bytes_per_line); > DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_chunk = %d\n", __func__, > *cursor_bytes_per_chunk); > DML_LOG_VERBOSE("DML::%s: cursor_bytes = %d\n", __func__, > *cursor_bytes); > - DML_LOG_VERBOSE("DML::%s: cursor_pitch = %d\n", __func__, cursor_bpp > == 2 ? 256 : (unsigned int)1 << (unsigned > int)math_ceil2(math_log((float)cursor_width, 2), 1)); > + DML_LOG_VERBOSE("DML::%s: cursor_pitch = %d\n", __func__, cursor_bpp > == 2 ? 256 : 1U << (unsigned int)math_ceil2(math_log((float)cursor_width, 2), > 1)); > #endif > } > > @@ -12205,15 +12205,15 @@ static void rq_dlg_get_wm_regs(const struct > dml2_display_cfg *display_cfg, const > { > double refclk_freq_in_mhz = > (display_cfg->overrides.hw.dlg_ref_clk_mhz > 0) ? > (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : > mode_lib->soc.dchub_refclk_mhz; > > - wm_regs->fclk_pstate = (int > unsigned)(mode_lib->mp.Watermark.FCLKChangeWatermark * refclk_freq_in_mhz); > - wm_regs->sr_enter = (int > unsigned)(mode_lib->mp.Watermark.StutterEnterPlusExitWatermark * > refclk_freq_in_mhz); > - wm_regs->sr_exit = (int > unsigned)(mode_lib->mp.Watermark.StutterExitWatermark * refclk_freq_in_mhz); > - wm_regs->sr_enter_z8 = (int > unsigned)(mode_lib->mp.Watermark.Z8StutterEnterPlusExitWatermark * > refclk_freq_in_mhz); > - wm_regs->sr_exit_z8 = (int > unsigned)(mode_lib->mp.Watermark.Z8StutterExitWatermark * refclk_freq_in_mhz); > - wm_regs->temp_read_or_ppt = (int > unsigned)(mode_lib->mp.Watermark.temp_read_or_ppt_watermark_us * > refclk_freq_in_mhz); > - wm_regs->uclk_pstate = (int > unsigned)(mode_lib->mp.Watermark.DRAMClockChangeWatermark * > refclk_freq_in_mhz); > - wm_regs->urgent = (int > unsigned)(mode_lib->mp.Watermark.UrgentWatermark * refclk_freq_in_mhz); > - wm_regs->usr = (int > unsigned)(mode_lib->mp.Watermark.USRRetrainingWatermark * refclk_freq_in_mhz); > + wm_regs->fclk_pstate = (unsigned > int)(mode_lib->mp.Watermark.FCLKChangeWatermark * refclk_freq_in_mhz); > + wm_regs->sr_enter = (unsigned > int)(mode_lib->mp.Watermark.StutterEnterPlusExitWatermark * > refclk_freq_in_mhz); > + wm_regs->sr_exit = (unsigned > int)(mode_lib->mp.Watermark.StutterExitWatermark * refclk_freq_in_mhz); > + wm_regs->sr_enter_z8 = (unsigned > int)(mode_lib->mp.Watermark.Z8StutterEnterPlusExitWatermark * > refclk_freq_in_mhz); > + wm_regs->sr_exit_z8 = (unsigned > int)(mode_lib->mp.Watermark.Z8StutterExitWatermark * refclk_freq_in_mhz); > + wm_regs->temp_read_or_ppt = (unsigned > int)(mode_lib->mp.Watermark.temp_read_or_ppt_watermark_us * > refclk_freq_in_mhz); > + wm_regs->uclk_pstate = (unsigned > int)(mode_lib->mp.Watermark.DRAMClockChangeWatermark * refclk_freq_in_mhz); > + wm_regs->urgent = (unsigned > int)(mode_lib->mp.Watermark.UrgentWatermark * refclk_freq_in_mhz); > + wm_regs->usr = (unsigned > int)(mode_lib->mp.Watermark.USRRetrainingWatermark * refclk_freq_in_mhz); > wm_regs->refcyc_per_trip_to_mem = (unsigned > int)(mode_lib->mp.UrgentLatency * refclk_freq_in_mhz); > wm_regs->refcyc_per_meta_trip_to_mem = (unsigned > int)(mode_lib->mp.MetaTripToMemory * refclk_freq_in_mhz); > wm_regs->frac_urg_bw_flip = (unsigned > int)(mode_lib->mp.FractionOfUrgentBandwidthImmediateFlip * 1000); > @@ -12670,7 +12670,7 @@ static void rq_dlg_get_dlg_reg( > disp_dlg_regs->refcyc_per_vm_req_flip = (unsigned > int)(math_pow(2, 23) - 1); > > > - DML_ASSERT(disp_dlg_regs->dst_y_after_scaler < (unsigned > int)8); > + DML_ASSERT(disp_dlg_regs->dst_y_after_scaler < 8U); > DML_ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned > int)math_pow(2, 13)); > > if (disp_dlg_regs->dst_y_per_pte_row_nom_l >= (unsigned > int)math_pow(2, 17)) { > @@ -13226,7 +13226,7 @@ void dml2_core_calcs_get_informative(const struct > dml2_core_internal_display_mod > > out->informative.misc.cstate_max_cap_mode = > dml_get_cstate_max_cap_mode(mode_lib); > > - out->min_clocks.dcn4x.dpprefclk_khz = (int > unsigned)dml_get_global_dppclk_khz(mode_lib); > + out->min_clocks.dcn4x.dpprefclk_khz = (unsigned > int)dml_get_global_dppclk_khz(mode_lib); > > out->informative.qos.max_active_fclk_change_latency_supported = > dml_get_fclk_change_latency(mode_lib); > > -- > 2.47.3 >
