Replace the hard-coded value 126 with the constant VCN_1_0__SRCID__JPEG_DECODE in jpeg_v1_0.c.
This improves code readability and maintainability by centralizing the SRCID definitions in ivsrcid/vcn/irqsrcs_vcn_1_0.h. Also fixes potential confusion when handling JPEG decode interrupts in the VCN 1.0 hardware block. Signed-off-by: Guilherme Ivo Bozi <[email protected]> --- drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 6 ++++-- drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_1_0.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c index b5bb7f4d607c..52a329773467 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c @@ -31,6 +31,7 @@ #include "vcn/vcn_1_0_offset.h" #include "vcn/vcn_1_0_sh_mask.h" +#include "ivsrcid/vcn/irqsrcs_vcn_1_0.h" static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev); static void jpeg_v1_0_set_irq_funcs(struct amdgpu_device *adev); @@ -443,7 +444,7 @@ static int jpeg_v1_0_process_interrupt(struct amdgpu_device *adev, DRM_DEBUG("IH: JPEG decode TRAP\n"); switch (entry->src_id) { - case 126: + case VCN_1_0__SRCID__JPEG_DECODE: amdgpu_fence_process(adev->jpeg.inst->ring_dec); break; default: @@ -488,7 +489,8 @@ int jpeg_v1_0_sw_init(struct amdgpu_ip_block *ip_block) int r; /* JPEG TRAP */ - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, 126, &adev->jpeg.inst->irq); + r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, + VCN_1_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); if (r) return r; diff --git a/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_1_0.h b/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_1_0.h index e5951709bfc3..d97883a88b0e 100644 --- a/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_1_0.h +++ b/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_1_0.h @@ -29,6 +29,7 @@ #define VCN_1_0__SRCID__UVD_ENC_GENERAL_PURPOSE 119 /* 0x77 Encoder General Purpose */ #define VCN_1_0__SRCID__UVD_ENC_LOW_LATENCY 120 /* 0x78 Encoder Low Latency */ #define VCN_1_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT 124 /* 0x7c UVD system message interrupt */ +#define VCN_1_0__SRCID__JPEG_DECODE 126 /* 0x7e JRBC Decode interrupt */ #endif /* __IRQSRCS_VCN_1_0_H__ */ -- 2.47.3
