Use enum instead of hard coded values. There is no functional change.
Signed-off-by: Harish Kasiviswanathan <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 13 +++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 ++++++++++++-------
.../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c | 6 ++--
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 ++--
11 files changed, 51 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 39894e38fee4..6b9d103fbff1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1441,6 +1441,19 @@ bool amdgpu_device_supports_boco(struct amdgpu_device
*adev);
bool amdgpu_device_supports_smart_shift(struct amdgpu_device *adev);
int amdgpu_device_supports_baco(struct amdgpu_device *adev);
void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev);
+
+/**
+ * enum amdgpu_pcie_bar - PCIe BAR index identifiers for P2P access
+ * @AMDGPU_PCIE_BAR_VRAM: VRAM aperture (BAR 0)
+ * @AMDGPU_PCIE_BAR_DOORBELL: Doorbell aperture (BAR 2)
+ * @AMDGPU_PCIE_BAR_MMIO: MMIO remap aperture (BAR 5)
+ */
+enum amdgpu_pcie_bar {
+ AMDGPU_PCIE_BAR_VRAM = 0,
+ AMDGPU_PCIE_BAR_DOORBELL = 2,
+ AMDGPU_PCIE_BAR_MMIO = 5,
+};
+
bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
struct amdgpu_device *peer_adev);
int amdgpu_device_baco_enter(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index 35d04e69aec0..3e8216913e5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
@@ -110,11 +110,11 @@ static bool amdgpu_read_bios_from_vram(struct
amdgpu_device *adev)
return false;
/* FB BAR not enabled */
- if (pci_resource_len(adev->pdev, 0) == 0)
+ if (pci_resource_len(adev->pdev, AMDGPU_PCIE_BAR_VRAM) == 0)
return false;
adev->bios = NULL;
- vram_base = pci_resource_start(adev->pdev, 0);
+ vram_base = pci_resource_start(adev->pdev, AMDGPU_PCIE_BAR_VRAM);
adev->bios = kmalloc(size, GFP_KERNEL);
if (!adev->bios)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 073f632f295a..5c14fdbc1847 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1146,7 +1146,7 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device
*adev)
/* skip if the bios has already enabled large BAR */
if (adev->gmc.real_vram_size &&
- (pci_resource_len(adev->pdev, 0) >= adev->gmc.real_vram_size))
+ (pci_resource_len(adev->pdev, AMDGPU_PCIE_BAR_VRAM) >=
adev->gmc.real_vram_size))
return 0;
/* Check if the root BUS has 64bit memory resources */
@@ -1165,7 +1165,7 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device
*adev)
return 0;
/* Limit the BAR size to what is available */
- max_size = pci_rebar_get_max_size(adev->pdev, 0);
+ max_size = pci_rebar_get_max_size(adev->pdev, AMDGPU_PCIE_BAR_VRAM);
if (max_size < 0)
return 0;
rbar_size = min(max_size, rbar_size);
@@ -1178,9 +1178,15 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device
*adev)
/* Tear down doorbell as resizing will release BARs */
amdgpu_doorbell_fini(adev);
- r = pci_resize_resource(adev->pdev, 0, rbar_size,
- (adev->asic_type >= CHIP_BONAIRE) ? 1 << 5
- : 1 << 2);
+ /*
+ * Resize the VRAM BAR. Exclude the MMIO BAR from being released
+ * during the resize. On Bonaire+ the MMIO BAR is at BAR 5, while
+ * on pre-Bonaire ASICs it is at BAR 2.
+ */
+ r = pci_resize_resource(adev->pdev, AMDGPU_PCIE_BAR_VRAM, rbar_size,
+ (adev->asic_type >= CHIP_BONAIRE)
+ ? BIT(AMDGPU_PCIE_BAR_MMIO)
+ : BIT(AMDGPU_PCIE_BAR_DOORBELL));
if (r == -ENOSPC)
dev_info(adev->dev,
"Not enough PCI address space for a large BAR.");
@@ -1191,7 +1197,7 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device
*adev)
* using the device.
*/
r = amdgpu_doorbell_init(adev);
- if (r || (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET))
+ if (r || (pci_resource_flags(adev->pdev, AMDGPU_PCIE_BAR_VRAM) &
IORESOURCE_UNSET))
return -ENODEV;
pci_write_config_word(adev->pdev, PCI_COMMAND, cmd);
@@ -3814,11 +3820,13 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* Registers mapping */
/* TODO: block userspace mapping of io register */
if (adev->asic_type >= CHIP_BONAIRE) {
- adev->rmmio_base = pci_resource_start(adev->pdev, 5);
- adev->rmmio_size = pci_resource_len(adev->pdev, 5);
+ /* Bonaire and newer use BAR 5 for MMIO registers */
+ adev->rmmio_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_MMIO);
+ adev->rmmio_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_MMIO);
} else {
- adev->rmmio_base = pci_resource_start(adev->pdev, 2);
- adev->rmmio_size = pci_resource_len(adev->pdev, 2);
+ /* Pre-Bonaire chips use BAR 2 for MMIO registers */
+ adev->rmmio_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_DOORBELL);
+ adev->rmmio_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_DOORBELL);
}
for (i = 0; i < AMD_IP_BLOCK_TYPE_NUM; i++)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
index bc7858567321..0251625887d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
@@ -201,14 +201,14 @@ int amdgpu_doorbell_init(struct amdgpu_device *adev)
return 0;
}
- if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
+ if (pci_resource_flags(adev->pdev, AMDGPU_PCIE_BAR_DOORBELL) &
IORESOURCE_UNSET)
return -EINVAL;
amdgpu_asic_init_doorbell_index(adev);
/* doorbell bar mapping */
- adev->doorbell.base = pci_resource_start(adev->pdev, 2);
- adev->doorbell.size = pci_resource_len(adev->pdev, 2);
+ adev->doorbell.base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_DOORBELL);
+ adev->doorbell.size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_DOORBELL);
adev->doorbell.num_kernel_doorbells =
min_t(u32, adev->doorbell.size / sizeof(u32),
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index e1ace7d44ffd..83611edbd7b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -694,8 +694,8 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 94d6631ce0bc..887edd7ea7c8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -694,8 +694,8 @@ static int gmc_v11_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 5bdd4b9b7893..a2a81e601e99 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -746,8 +746,8 @@ static int gmc_v12_0_mc_init(struct amdgpu_device *adev)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index cc272a96fcef..14963e9edac0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -323,8 +323,8 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
adev->gmc.visible_vram_size = adev->gmc.aper_size;
/* set the gart size */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index fb5e33c8a5ee..a0ab5ab7df94 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -379,8 +379,8 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) &&
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 963d5b0fa87b..5f83311d7c26 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -572,8 +572,8 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index e7b78027002b..0cc4ac7e8ad9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1593,7 +1593,7 @@ static int gmc_v9_0_early_init(struct amdgpu_ip_block
*ip_block)
* mode.
*/
adev->gmc.is_app_apu = (pkg_type == AMDGPU_PKG_TYPE_APU &&
- !pci_resource_len(adev->pdev, 0));
+ !pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM));
}
gmc_v9_0_set_gmc_funcs(adev);
@@ -1705,8 +1705,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.aper_base = pci_resource_start(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
+ adev->gmc.aper_size = pci_resource_len(adev->pdev,
AMDGPU_PCIE_BAR_VRAM);
#ifdef CONFIG_X86_64
/*
--
2.43.0
