Split and correct DPM clock attribute constraints for GFX 9.4.1 (Arcturus) and 9.4.2 (Aldebaran) ASICs:
- Arcturus (9.4.1): Keep restrictions for mclk/socclk/fclk, update comment - Aldebaran (9.4.2): Add dedicated per-clock constraints: * mclk/socclk: Only support voltage control, disable level setting * fclk: Mark as fully unsupported * pcie: Move multi-AID check into 9.4.2 case, disable level setting Signed-off-by: Yang Wang <[email protected]> --- drivers/gpu/drm/amd/pm/amdgpu_pm.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c index fd2e63530e8c..9ee3053973cf 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c @@ -2033,16 +2033,11 @@ static int pp_dpm_clk_default_attr_update(struct amdgpu_device *adev, struct amd gc_ver == IP_VERSION(11, 0, 2) || gc_ver == IP_VERSION(11, 0, 3)) && adev->vcn.num_vcn_inst >= 2)) *states = ATTR_STATE_UNSUPPORTED; - } else if (DEVICE_ATTR_IS(pp_dpm_pcie)) { - if (gc_ver == IP_VERSION(9, 4, 2) || - amdgpu_is_multi_aid(adev)) - *states = ATTR_STATE_UNSUPPORTED; } switch (gc_ver) { case IP_VERSION(9, 4, 1): - case IP_VERSION(9, 4, 2): - /* the Mi series card does not support standalone mclk/socclk/fclk level setting */ + /* Arcturus does not support standalone mclk/socclk/fclk level setting */ if (DEVICE_ATTR_IS(pp_dpm_mclk) || DEVICE_ATTR_IS(pp_dpm_socclk) || DEVICE_ATTR_IS(pp_dpm_fclk)) { @@ -2050,6 +2045,25 @@ static int pp_dpm_clk_default_attr_update(struct amdgpu_device *adev, struct amd dev_attr->store = NULL; } break; + case IP_VERSION(9, 4, 2): + if (DEVICE_ATTR_IS(pp_dpm_mclk) || + DEVICE_ATTR_IS(pp_dpm_socclk)) { + /* Aldebaran mclk/socclk DPM only supports voltage control, + * not allow to set dpm level directly */ + dev_attr->attr.mode &= ~S_IWUGO; + dev_attr->store = NULL; + } else if (DEVICE_ATTR_IS(pp_dpm_pcie)) { + if (amdgpu_is_multi_aid(adev)) { + *states = ATTR_STATE_UNSUPPORTED; + } else { + dev_attr->attr.mode &= ~S_IWUGO; + dev_attr->store = NULL; + } + } else if (DEVICE_ATTR_IS(pp_dpm_fclk)) { + /* Aldebaran does not support fclk dpm */ + *states = ATTR_STATE_UNSUPPORTED; + } + break; default: break; } -- 2.47.3
