UVD 4.x and older have two requirements for CS BOs:
1. All BOs must not cross 256M segments
2. MSG and FB BOs must be located in the same segment as the VCPU BO
The amdgpu_uvd code attempts to solve those requirements,
but unfortunately it has hit various limitations:
* VCPU BO may be placed in a different segment
* GTT manager doesn't respect placement requirements
* GTT allocations may cross 256M
* GTT->GTT moves are not implemented
Let's solve these issues by fixing the GTT manager,
making sure that GTT allocations are placed in 256M segments.
Also fix forcing MSG and FB BOs to the UVD segment
when the UVD segment isn't the first segment, which can be
the case when resizable BAR is enabled.
This series should be backported to 7.0 and 7.1 because
technically this may have been a regression for some users
caused by switching to amdgpu by default.
Changes in v2:
* Fix GTT->GTT moves instead of specifying a placement in
the amdgpu_ttm_alloc_gart() function.
* Move MSG and FB BOs to the VCPU segments, leave all other
BOs in segment 0 like before.
Timur Kristóf (4):
drm/amdgpu: Respect placement requirements in amdgpu_gtt_mgr functions
drm/amdgpu: Fix amdgpu_bo_move() when old_mem and new_mem are both GTT
drm/amdgpu/uvd: Place VCPU BO only in VRAM for UVD 4.x and older
drm/amdgpu/uvd: Fix forcing MSG, FB BOs into VCPU segment when it
isn't at 0 (v2)
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 30 ++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 ++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 50 ++++++++++++++-------
3 files changed, 81 insertions(+), 17 deletions(-)
--
2.54.0
