During amdgpu_ip_block_hw_fini(), the driver sends a prepare-for-unload message to PMFW. PMFW then performs nBIF and SYSHUB function-level resets (FLR), disabling PCIe CFG space reset, which clears the FB enable bit to zero and disables MC (memory controller) access from the host.
Re-enable MC access via the nbio mc_access_enable callback after hw_fini completes, scoped to APUs with SMU V15. Signed-off-by: Shubhankar Milind Sardeshpande <[email protected]> Signed-off-by: Suresh Guttula <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 5ccbe6c885cf..7af9065ee5d6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2826,6 +2826,13 @@ static int amdgpu_device_ip_fini_early(struct amdgpu_device *adev) amdgpu_ip_block_hw_fini(&adev->ip_blocks[i]); } + /* SMU resets BIF_FB_EN to zero during hw_fini, re-enable MC access + * on APUs with SMU V15 */ + if ((adev->flags & AMD_IS_APU) && + amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(15, 0, 0) && + adev->nbio.funcs && adev->nbio.funcs->mc_access_enable) + adev->nbio.funcs->mc_access_enable(adev, true); + if (amdgpu_sriov_vf(adev)) { if (amdgpu_virt_release_full_gpu(adev, false)) dev_err(adev->dev, -- 2.43.0
