From: Taimur Hassan <[email protected]> This version brings along the following updates:
- Enable DCN 4.2.1: * Add register header files for DCN42B * Add DCN42B DC resource files * Add DCN42B DMUB support * Add DCN42B code to DC and dcn42b_soc_bb to DML2 * Add DCN42 PMO init_for_pstate_support * Enable DCN42 PMO policy and pstate pmo * Enable DCN 4.2.1 in amdgpu_dm * Enable DM for DCN 4.2.1 - Add no_native_i2c codepath - Add amdgpu_dm KUnit tests for: * amdgpu_dm_psr_set_event * dm_ism_dispatch_next_event and additional ISM functions * amdgpu_dm_colorop * color LUT functions and transfer function helpers - Enable gcov coverage for amdgpu_dm KUnit builds - Extract dm_ism_dispatch_next_event and transfer function helpers - Refactor amdgpu_dm_initialize_default_pipeline - Clean up PSR helper functions - Fix gamma 2.2 colorop TF direction in tests - Handle aux_inst for connectors without DDC pin - Fix DP_PIXEL_FORMAT fields & update clk_src for DCN4x - Avoid DPMS-on for phantom stream - Change default driver setting for "Force ODM2:1 for eDP" policy - Add DC_VALIDATE_MODE_AND_PROGRAMMING condition check for force odm2:1 - Check for sharpening case when calculating max vtaps for scaler - Add DRAM table fields to clk_mgr_internal - Enable frame skipping in 0x37B - Bound VBIOS record-chain walk loops - Clamp HDMI HDCP2 rx_id_list read to buffer size - Clamp VBIOS HDMI retimer register count to array size - Reject gpio_bitshift >= 32 in bios_parser_get_gpio_pin_info() - Use krealloc_array() in dal_vector_reserve() - Fix NULL deref and buffer over-read in SDP debugfs - Fix out-of-bounds read in dp_get_eq_aux_rd_interval() - FW Release 0.1.61.0 Acked-by: Tom Chung <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Signed-off-by: Ray Wu <[email protected]> --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 3ffcb74552c4..7b356bf95a67 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -63,7 +63,7 @@ struct dcn_dsc_reg_state; struct dcn_optc_reg_state; struct dcn_dccg_reg_state; -#define DC_VER "3.2.383" +#define DC_VER "3.2.384" /** * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC -- 2.43.0
