On Thu, May 7, 2026 at 4:19 AM Priya Hosur <[email protected]> wrote: > > In smu_v14_0_0_set_soft_freq_limited_range(), the gfxclk floor is > programmed via SetHardMinGfxClk together with SetSoftMaxGfxClk. Under > power_dpm_force_performance_level=high this pins HardMin to peak gfxclk. > > In PMFW arbitration HardMin has higher priority than SoftMax, so the > firmware thermal/PPT throttler cannot clamp gfxclk via SoftMax once > HardMin is set to peak. Replace SetHardMinGfxClk with SetSoftMinGfxclk > so the driver still requests peak performance but the firmware > throttler retains the ability to clamp gfxclk under thermal/PPT > pressure. SoftMax handling is unchanged and no other clock domains > are affected. > > Signed-off-by: Priya Hosur <[email protected]>
Acked-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c > index c76b1f07885e..2fe006de927a 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c > @@ -1231,7 +1231,8 @@ static int > smu_v14_0_0_set_soft_freq_limited_range(struct smu_context *smu, > switch (clk_type) { > case SMU_GFXCLK: > case SMU_SCLK: > - msg_set_min = SMU_MSG_SetHardMinGfxClk; > + /* SoftMin lets PMFW throttle gfxclk; HardMin would override > SoftMax. */ > + msg_set_min = SMU_MSG_SetSoftMinGfxclk; > msg_set_max = SMU_MSG_SetSoftMaxGfxClk; > break; > case SMU_FCLK: > -- > 2.43.0 >
