On Thu, May 28, 2026 at 3:19 AM Pratik Vishwakarma <[email protected]> wrote: > > From: Shubhankar Milind Sardeshpande <[email protected]> > > Add ATHUB 3_4_2 > > Signed-off-by: Shubhankar Milind Sardeshpande > <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/athub_v3_0.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v3_0.c > b/drivers/gpu/drm/amd/amdgpu/athub_v3_0.c > index d1bba9c64e16..b42d9876e0a1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/athub_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/athub_v3_0.c > @@ -43,6 +43,7 @@ static uint32_t athub_v3_0_get_cg_cntl(struct amdgpu_device > *adev) > data = RREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_0_1); > break; > case IP_VERSION(3, 3, 0): > + case IP_VERSION(3, 4, 2): > data = RREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_3_0); > break; > default: > @@ -59,6 +60,7 @@ static void athub_v3_0_set_cg_cntl(struct amdgpu_device > *adev, uint32_t data) > WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_0_1, data); > break; > case IP_VERSION(3, 3, 0): > + case IP_VERSION(3, 4, 2): > WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_3_0, data); > break; > default: > @@ -112,6 +114,7 @@ int athub_v3_0_set_clockgating(struct amdgpu_device *adev, > case IP_VERSION(3, 0, 1): > case IP_VERSION(3, 0, 2): > case IP_VERSION(3, 3, 0): > + case IP_VERSION(3, 4, 2): > athub_v3_0_update_medium_grain_clock_gating(adev, > state == AMD_CG_STATE_GATE); > athub_v3_0_update_medium_grain_light_sleep(adev, > -- > 2.43.0 >
