On 29-May-26 11:47 AM, Asad Kamal wrote:
vega10_odn_edit_dpm_table() and smu7_odn_edit_dpm_table() could mutate
the live ODN table for valid triples, then return 0 after detecting a
truncated buffer or out-of-range index. Validate all (index, clock,
voltage) triples first and return -EINVAL on any failure, only then
apply updates.
Signed-off-by: Asad Kamal <[email protected]>
---
.../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 33 +++++++++++--------
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 27 +++++++++------
2 files changed, 37 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 416b9380a70e..0a74e4f98496 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -5648,23 +5648,30 @@ static int smu7_odn_edit_dpm_table(struct pp_hwmgr
*hwmgr,
}
for (i = 0; i < size; i += 3) {
- if (i + 3 > size || input[i] >=
podn_dpm_table_in_backend->num_of_pl) {
Seeing the same error print for both cases. May retain the check
+ if (i + 3 > size) {
pr_info("invalid clock voltage input \n");
Or, change message to 'truncated clock/voltage input'.
- return 0;
+ return -EINVAL;
}
- input_level = input[i];
- input_clk = input[i+1] * 100;
- input_vol = input[i+2];
-
- if (smu7_check_clk_voltage_valid(hwmgr, type, input_clk,
input_vol)) {
- podn_dpm_table_in_backend->entries[input_level].clock =
input_clk;
- podn_vdd_dep_in_backend->entries[input_level].clk =
input_clk;
- podn_dpm_table_in_backend->entries[input_level].vddc =
input_vol;
- podn_vdd_dep_in_backend->entries[input_level].vddc =
input_vol;
- podn_vdd_dep_in_backend->entries[input_level].vddgfx =
input_vol;
- } else {
+ if (input[i] >= podn_dpm_table_in_backend->num_of_pl) {
+ pr_info("invalid clock voltage input\n");
An this one to 'invalid clock/voltage level'.
return -EINVAL;
}
+ input_level = input[i];
Looks like 'input_level' is not used within this loop.
Thanks,
Lijo
+ input_clk = input[i + 1] * 100;
+ input_vol = input[i + 2];
+ if (!smu7_check_clk_voltage_valid(hwmgr, type, input_clk,
input_vol))
+ return -EINVAL;
+ }
+
+ for (i = 0; i < size; i += 3) {
+ input_level = input[i];
+ input_clk = input[i + 1] * 100;
+ input_vol = input[i + 2];
+ podn_dpm_table_in_backend->entries[input_level].clock =
input_clk;
+ podn_vdd_dep_in_backend->entries[input_level].clk = input_clk;
+ podn_dpm_table_in_backend->entries[input_level].vddc =
input_vol;
+ podn_vdd_dep_in_backend->entries[input_level].vddc = input_vol;
+ podn_vdd_dep_in_backend->entries[input_level].vddgfx =
input_vol;
}
return 0;
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 8b8c4e899878..ad06a2f26d91 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -5477,21 +5477,28 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr
*hwmgr,
}
for (i = 0; i < size; i += 3) {
- if (i + 3 > size || input[i] >= podn_vdd_dep_table->count) {
+ if (i + 3 > size) {
pr_info("invalid clock voltage input\n");
- return 0;
+ return -EINVAL;
}
input_level = input[i];
- input_clk = input[i+1] * 100;
- input_vol = input[i+2];
-
- if (vega10_check_clk_voltage_valid(hwmgr, type, input_clk,
input_vol)) {
- dpm_table->dpm_levels[input_level].value = input_clk;
- podn_vdd_dep_table->entries[input_level].clk =
input_clk;
- podn_vdd_dep_table->entries[input_level].vddc =
input_vol;
- } else {
+ if (input_level >= podn_vdd_dep_table->count) {
+ pr_info("invalid clock voltage input\n");
return -EINVAL;
}
+ input_clk = input[i + 1] * 100;
+ input_vol = input[i + 2];
+ if (!vega10_check_clk_voltage_valid(hwmgr, type, input_clk,
input_vol))
+ return -EINVAL;
+ }
+
+ for (i = 0; i < size; i += 3) {
+ input_level = input[i];
+ input_clk = input[i + 1] * 100;
+ input_vol = input[i + 2];
+ dpm_table->dpm_levels[input_level].value = input_clk;
+ podn_vdd_dep_table->entries[input_level].clk = input_clk;
+ podn_vdd_dep_table->entries[input_level].vddc = input_vol;
}
vega10_odn_update_soc_table(hwmgr, type);
return 0;
