Signal USERQ EOP subscriptions through the userq manager associated with the queue, using the shared AMDGPU EVENTFD event type and a queue-scoped routing key.
In the current USERQ IRQ path, the queue object does not store an explicit logical queue_id. However, it already carries a doorbell_index, which is queue-specific and naturally available in the IRQ flow. Use the queue's doorbell_index as the queue-scoped routing key for USERQ EOP signaling. This folds the earlier intermediate gfx11 eventfd hookup into the final queue-aware signaling path, so the series only introduces the IRQ-side signaling once. For USERQ EOP, queue-scoped subscriptions are matched using the queue's doorbell_index as the queue-specific routing key. Userspace passes the same value through the current queue_id field when binding or unbinding EVENTFD subscriptions. Signaling remains notification-only and uses plain eventfd_signal(ctx) once per matched occurrence. Changes in v8: - Use queue->qid instead of doorbell_index for queue-scoped event handling (Alex) Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Change-Id: Ia225d0927e977c7c7546cd479a0a40be6ca89467 --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c index 1941bfbcbfbf..ae0e9f9b9611 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -26,6 +26,8 @@ #include <linux/module.h> #include <linux/pci.h> #include "amdgpu.h" +#include "amdgpu_userq.h" +#include "amdgpu_eventfd.h" #include "amdgpu_gfx.h" #include "amdgpu_psp.h" #include "amdgpu_smu.h" @@ -6488,7 +6490,26 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev, DRM_DEBUG("IH: CP EOP\n"); if (adev->enable_mes && doorbell_offset) { + struct amdgpu_usermode_queue *queue = NULL; + struct amdgpu_userq_mgr *mgr = NULL; + struct xarray *xa = &adev->userq_doorbell_xa; + u32 queue_key = 0; + unsigned long flags; + amdgpu_userq_process_fence_irq(adev, doorbell_offset); + + xa_lock_irqsave(xa, flags); + queue = xa_load(xa, doorbell_offset); + if (queue) { + mgr = queue->userq_mgr; + queue_key = queue->qid; + } + + if (mgr && mgr->eventfd_mgr) + amdgpu_eventfd_signal(mgr->eventfd_mgr, + DRM_AMDGPU_EVENT_TYPE_USERQ_EOP, + queue_key); + xa_unlock_irqrestore(xa, flags); } else { me_id = (entry->ring_id & 0x0c) >> 2; pipe_id = (entry->ring_id & 0x03) >> 0; -- 2.34.1
