The current EVENTFD UAPI uses a userspace-defined event identifier. For render-node event notifications, userspace should subscribe to kernel-defined event types instead, allowing the kernel to define event semantics and signaling sources.
Add a shared AMDGPU EVENTFD event type enum and update the EVENTFD UAPI to use event_type instead of event_id. Value 0 is reserved and rejected by the existing event_type validation. queue_id remains part of the UAPI and is used to distinguish queue-scoped subscriptions from GPU/device-scoped subscriptions. Eventfd signaling remains notification-only. v10: (per Christian) - Add a comment clarifying that the flags field is currently unused, reserved for future UAPI extensions, and must be zero. - Introduce event_type directly in the EVENTFD UAPI. - Remove the INVALID event type; value 0 remains rejected by validation. - Squash the event_id to event_type rename into the original UAPI patch. Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 36 +++++++++++++++++++++ include/uapi/drm/amdgpu_drm.h | 43 +++++++++++++++++++++++++ 4 files changed, 85 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index a75c68195df9..54bc31ee795a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -460,6 +460,11 @@ struct amdgpu_fpriv { struct amdgpu_eventfd_mgr eventfd_mgr; }; +struct drm_device; +struct drm_file; + +int amdgpu_eventfd_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); + int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv); /* diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 1781c0c3d010..aaa4dd57099f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -3076,6 +3076,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = { DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_SIGNAL, amdgpu_userq_signal_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_WAIT, amdgpu_userq_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(AMDGPU_GEM_LIST_HANDLES, amdgpu_gem_list_handles_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(AMDGPU_EVENTFD, amdgpu_eventfd_ioctl, DRM_RENDER_ALLOW), }; static const struct drm_driver amdgpu_kms_driver = { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index f5719500527f..f7c750094393 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -634,6 +634,42 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev, return 0; } +int amdgpu_eventfd_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) +{ + struct amdgpu_fpriv *fpriv = file_priv->driver_priv; + struct drm_amdgpu_eventfd *args = data; + + if (!fpriv) + return -EINVAL; + + /* + * flags are reserved for future UAPI extensions and must be zero. + */ + if (args->flags || !args->event_type || args->eventfd < 0) + return -EINVAL; + + /* + * Queue-scoped subscriptions are enabled by the later queue-reference + * routing patch. Until then, keep queue_id zero. + */ + if (args->queue_id) + return -EINVAL; + + switch (args->op) { + case DRM_AMDGPU_EVENTFD_OP_BIND: + return amdgpu_eventfd_bind(&fpriv->eventfd_mgr, + args->event_type, + args->eventfd); + case DRM_AMDGPU_EVENTFD_OP_UNBIND: + return amdgpu_eventfd_unbind(&fpriv->eventfd_mgr, + args->event_type, + args->eventfd); + default: + return -EINVAL; + } +} + /* * Userspace get information ioctl */ diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 9f3090db2f16..bf4fc61cf0c7 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -39,6 +39,7 @@ extern "C" { #endif #define DRM_AMDGPU_GEM_CREATE 0x00 +#define DRM_AMDGPU_EVENTFD 0x1A #define DRM_AMDGPU_GEM_MMAP 0x01 #define DRM_AMDGPU_CTX 0x02 #define DRM_AMDGPU_BO_LIST 0x03 @@ -79,6 +80,8 @@ extern "C" { #define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal) #define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait) #define DRM_IOCTL_AMDGPU_GEM_LIST_HANDLES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_LIST_HANDLES, struct drm_amdgpu_gem_list_handles) +#define DRM_IOCTL_AMDGPU_EVENTFD \ + DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_EVENTFD, struct drm_amdgpu_eventfd) /** * DOC: memory domains @@ -204,6 +207,46 @@ union drm_amdgpu_gem_create { struct drm_amdgpu_gem_create_out out; }; +enum drm_amdgpu_event_type { + DRM_AMDGPU_EVENT_TYPE_USERQ_EOP = 1, + DRM_AMDGPU_EVENT_TYPE_QUEUE_RESET = 2, + DRM_AMDGPU_EVENT_TYPE_MEMORY_EXCEPTION = 3, + DRM_AMDGPU_EVENT_TYPE_SCRATCH = 4, + DRM_AMDGPU_EVENT_TYPE_GPU_RESET = 5, +}; + +enum drm_amdgpu_eventfd_op { + DRM_AMDGPU_EVENTFD_OP_BIND = 0, + DRM_AMDGPU_EVENTFD_OP_UNBIND = 1, +}; + +/** + * struct drm_amdgpu_eventfd - bind or unbind an eventfd to an AMDGPU event + * @op: operation type, see &enum drm_amdgpu_eventfd_op + * @event_type: kernel-defined AMDGPU event type + * @eventfd: eventfd file descriptor + * @queue_id: queue identifier for queue-scoped subscriptions, or 0 for + * device/GPU-scoped subscriptions + * @flags: must be 0 + * + * This ioctl lets userspace register or unregister eventfd notifications + * for a render-node event. + * + * Eventfd signaling is notification-only. + * + * USERQ_EOP, QUEUE_RESET, and SCRATCH are queue-scoped events. + * Userspace specifies @queue_id when registering these subscriptions. + * + * MEMORY_EXCEPTION is currently GPU-scoped and requires @queue_id = 0. + */ +struct drm_amdgpu_eventfd { + __u32 op; + __u32 event_type; + __s32 eventfd; + __u32 queue_id; + __u32 flags; +}; + /** Opcode to create new residency list. */ #define AMDGPU_BO_LIST_OP_CREATE 0 /** Opcode to destroy previously created residency list */ -- 2.34.1
