On 2026. május 29., péntek 13:24:04 közép-európai nyári idő Christian König 
wrote:
> The IMMEDIATE (page fault) and DIRECT (reset) pool should be used only
> very rarely and by a single thread.
> 
> Saves roughly 1.25MiB of memory and GART space for each amdgpu device.
> 
> Signed-off-by: Christian König <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c   | 8 +++++++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 --
>  2 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index f1ed4a436f5b..334f95f8f339
> 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -351,14 +351,20 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring,
> unsigned int num_ibs, */
>  int amdgpu_ib_pool_init(struct amdgpu_device *adev)
>  {
> +     const int sizes[AMDGPU_IB_POOL_MAX] = {
> +             [AMDGPU_IB_POOL_DELAYED] = SZ_1M,
> +             [AMDGPU_IB_POOL_IMMEDIATE] = SZ_128K,
> +             [AMDGPU_IB_POOL_DIRECT] = SZ_512K
> +     };
>       int r, i;
> 
>       if (adev->ib_pool_ready)
>               return 0;
> 
> +

There is a spurious newline here.

Otherwise the patch makes good sense.
Reviewed-by: Timur Kristóf <[email protected]>

>       for (i = 0; i < AMDGPU_IB_POOL_MAX; i++) {
>               r = amdgpu_sa_bo_manager_init(adev, &adev->ib_pools[i],
> -                                           
AMDGPU_IB_POOL_SIZE, 256,
> +                                           sizes[i], 256,
>                                             
AMDGPU_GEM_DOMAIN_GTT);
>               if (r)
>                       goto error;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 8f28b3bd7010..1a063a0a4280
> 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -68,8 +68,6 @@ enum amdgpu_ring_priority_level {
> 
>  #define to_amdgpu_ring(s) container_of((s), struct amdgpu_ring, sched)
> 
> -#define AMDGPU_IB_POOL_SIZE  (1024 * 1024)
> -
>  enum amdgpu_ring_type {
>       AMDGPU_RING_TYPE_GFX            = AMDGPU_HW_IP_GFX,
>       AMDGPU_RING_TYPE_COMPUTE        = AMDGPU_HW_IP_COMPUTE,




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