Use the new gmc helpers for tlb invalidations.
Signed-off-by: Alex Deucher <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 186 +------------------------
1 file changed, 7 insertions(+), 179 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index cdbd0f74aeaf7..0b37b797454f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -188,20 +188,6 @@ static void gmc_v10_0_set_irq_funcs(struct amdgpu_device
*adev)
}
}
-/**
- * gmc_v10_0_use_invalidate_semaphore - judge whether to use semaphore
- *
- * @adev: amdgpu_device pointer
- * @vmhub: vmhub type
- *
- */
-static bool gmc_v10_0_use_invalidate_semaphore(struct amdgpu_device *adev,
- uint32_t vmhub)
-{
- return ((vmhub == AMDGPU_MMHUB0(0)) &&
- (!amdgpu_sriov_vf(adev)));
-}
-
static bool gmc_v10_0_get_atc_vmid_pasid_mapping_info(
struct amdgpu_device *adev,
uint8_t vmid, uint16_t *p_pasid)
@@ -222,109 +208,6 @@ static bool gmc_v10_0_get_atc_vmid_pasid_mapping_info(
* by the amdgpu vm/hsa code.
*/
-/**
- * gmc_v10_0_flush_gpu_tlb - gart tlb flush callback
- *
- * @adev: amdgpu_device pointer
- * @vmid: vm instance to flush
- * @vmhub: vmhub type
- * @flush_type: the flush type
- *
- * Flush the TLB for the requested page table.
- */
-static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
- uint32_t vmhub, uint32_t flush_type)
-{
- bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);
- struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
- u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
- /* Use register 17 for GART */
- const unsigned int eng = 17;
- unsigned char hub_ip = 0;
- u32 sem, req, ack;
- unsigned int i;
- u32 tmp;
-
- sem = hub->vm_inv_eng0_sem + hub->eng_distance * eng;
- req = hub->vm_inv_eng0_req + hub->eng_distance * eng;
- ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
-
- /* flush hdp cache */
- amdgpu_device_flush_hdp(adev, NULL);
-
- /* This is necessary for SRIOV as well as for GFXOFF to function
- * properly under bare metal
- */
- if (adev->gfx.kiq[0].ring.sched.ready && !adev->enable_mes &&
- (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
- amdgpu_gmc_fw_reg_write_reg_wait(adev, req, ack, inv_req,
- 1 << vmid, GET_INST(GC, 0));
- return;
- }
-
- /* This path is needed before KIQ/MES/GFXOFF are set up */
- hub_ip = (vmhub == AMDGPU_GFXHUB(0)) ? GC_HWIP : MMHUB_HWIP;
-
- /* disabllow gfxoff when we invalidate */
- if (hub_ip == GC_HWIP)
- amdgpu_gfx_off_ctrl(adev, false);
-
- spin_lock(&adev->gmc.invalidate_lock);
- /*
- * It may lose gpuvm invalidate acknowldege state across power-gating
- * off cycle, add semaphore acquire before invalidation and semaphore
- * release after invalidation to avoid entering power gated state
- * to WA the Issue
- */
-
- /* TODO: It needs to continue working on debugging with semaphore for
GFXHUB as well. */
- if (use_semaphore) {
- for (i = 0; i < adev->usec_timeout; i++) {
- /* a read return value of 1 means semaphore acuqire */
- tmp = RREG32_RLC_NO_KIQ(sem, hub_ip);
- if (tmp & 0x1)
- break;
- udelay(1);
- }
-
- if (i >= adev->usec_timeout)
- DRM_ERROR("Timeout waiting for sem acquire in VM
flush!\n");
- }
-
- WREG32_RLC_NO_KIQ(req, inv_req, hub_ip);
-
- /*
- * Issue a dummy read to wait for the ACK register to be cleared
- * to avoid a false ACK due to the new fast GRBM interface.
- */
- if ((vmhub == AMDGPU_GFXHUB(0)) &&
- (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 3, 0)))
- RREG32_RLC_NO_KIQ(req, hub_ip);
-
- /* Wait for ACK with a delay.*/
- for (i = 0; i < adev->usec_timeout; i++) {
- tmp = RREG32_RLC_NO_KIQ(ack, hub_ip);
- tmp &= 1 << vmid;
- if (tmp)
- break;
-
- udelay(1);
- }
-
- /* TODO: It needs to continue working on debugging with semaphore for
GFXHUB as well. */
- if (use_semaphore)
- WREG32_RLC_NO_KIQ(sem, 0, hub_ip);
-
- spin_unlock(&adev->gmc.invalidate_lock);
-
- if (hub_ip == GC_HWIP)
- amdgpu_gfx_off_ctrl(adev, true);
-
- if (i >= adev->usec_timeout)
- dev_err(adev->dev, "Timeout waiting for VM flush hub: %d!\n",
- vmhub);
-}
-
/**
* gmc_v10_0_flush_gpu_tlb_pasid - tlb flush via pasid
*
@@ -341,7 +224,7 @@ static void gmc_v10_0_flush_gpu_tlb_pasid(struct
amdgpu_device *adev,
bool all_hub, uint32_t inst)
{
uint16_t queried;
- int vmid, i;
+ int vmid;
for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) {
bool valid;
@@ -351,66 +234,11 @@ static void gmc_v10_0_flush_gpu_tlb_pasid(struct
amdgpu_device *adev,
if (!valid || queried != pasid)
continue;
- if (all_hub) {
- for_each_set_bit(i, adev->vmhubs_mask,
- AMDGPU_MAX_VMHUBS)
- gmc_v10_0_flush_gpu_tlb(adev, vmid, i,
- flush_type);
- } else {
- gmc_v10_0_flush_gpu_tlb(adev, vmid, AMDGPU_GFXHUB(0),
- flush_type);
- }
+ amdgpu_gmc_flush_gpu_tlb_pasid_helper(adev, vmid, flush_type,
+ all_hub, inst);
}
}
-static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
- unsigned int vmid, uint64_t
pd_addr)
-{
- bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(ring->adev,
ring->vm_hub);
- struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->vm_hub];
- uint32_t req = hub->vmhub_funcs->get_invalidate_req(vmid, 0);
- unsigned int eng = ring->vm_inv_eng;
-
- /*
- * It may lose gpuvm invalidate acknowldege state across power-gating
- * off cycle, add semaphore acquire before invalidation and semaphore
- * release after invalidation to avoid entering power gated state
- * to WA the Issue
- */
-
- /* TODO: It needs to continue working on debugging with semaphore for
GFXHUB as well. */
- if (use_semaphore)
- /* a read return value of 1 means semaphore acuqire */
- amdgpu_ring_emit_reg_wait(ring,
- hub->vm_inv_eng0_sem +
- hub->eng_distance * eng, 0x1, 0x1);
-
- amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 +
- (hub->ctx_addr_distance * vmid),
- lower_32_bits(pd_addr));
-
- amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 +
- (hub->ctx_addr_distance * vmid),
- upper_32_bits(pd_addr));
-
- amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req +
- hub->eng_distance * eng,
- hub->vm_inv_eng0_ack +
- hub->eng_distance * eng,
- req, 1 << vmid);
-
- /* TODO: It needs to continue working on debugging with semaphore for
GFXHUB as well. */
- if (use_semaphore)
- /*
- * add semaphore release after invalidation,
- * write with 0 means semaphore release
- */
- amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem +
- hub->eng_distance * eng, 0);
-
- return pd_addr;
-}
-
static void gmc_v10_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned
int vmid,
unsigned int pasid)
{
@@ -551,9 +379,9 @@ static unsigned int gmc_v10_0_get_vbios_fb_size(struct
amdgpu_device *adev)
}
static const struct amdgpu_gmc_funcs gmc_v10_0_gmc_funcs = {
- .flush_gpu_tlb = gmc_v10_0_flush_gpu_tlb,
+ .flush_gpu_tlb = amdgpu_gmc_flush_gpu_tlb_helper,
.flush_gpu_tlb_pasid = gmc_v10_0_flush_gpu_tlb_pasid,
- .emit_flush_gpu_tlb = gmc_v10_0_emit_flush_gpu_tlb,
+ .emit_flush_gpu_tlb = amdgpu_gmc_emit_flush_gpu_tlb_helper,
.emit_pasid_mapping = gmc_v10_0_emit_pasid_mapping,
.get_vm_pde = gmc_v10_0_get_vm_pde,
.get_vm_pte = gmc_v10_0_get_vm_pte,
@@ -955,9 +783,9 @@ static int gmc_v10_0_gart_enable(struct amdgpu_device *adev)
if (!adev->in_s0ix)
adev->gfxhub.funcs->set_fault_enable_default(adev, value);
adev->mmhub.funcs->set_fault_enable_default(adev, value);
- gmc_v10_0_flush_gpu_tlb(adev, 0, AMDGPU_MMHUB0(0), 0);
+ adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_MMHUB0(0), 0);
if (!adev->in_s0ix)
- gmc_v10_0_flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);
+ adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_MMHUB0(0),
0);
drm_info(adev_to_drm(adev), "PCIE GART of %uM enabled (table at
0x%016llX).\n",
(unsigned int)(adev->gmc.gart_size >> 20),
--
2.55.0
