On Thu, Jul 23, 2026 at 5:55 AM Qiang Yu <[email protected]> wrote: > > From: Qiang Yu <[email protected]> > > TA_CNTL2.TRUNCATE_COORD_MODE selects whether texture coordinate > truncation is D3D9/GL/Vulkan conformant. gfx11 reads it and reports it to > userspace via AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD, but gfx12 never > read it, so the flag was always reported as 0 and userspace fell back to > the non-conformant path. > > Read it in gfx_v12_0_constants_init() like gfx11 does. > > Fixes: 52cb80c12e8a ("drm/amdgpu: Add gfx v12_0 ip block support (v6)")
Reviewed-by: Alex Deucher <[email protected]> > Signed-off-by: Qiang Yu <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > index b3887c5262a0..d109fa06e32a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > @@ -1827,6 +1827,12 @@ static void gfx_v12_0_constants_init(struct > amdgpu_device *adev) > gfx_v12_0_get_cu_info(adev, &adev->gfx.cu_info); > gfx_v12_0_get_tcc_info(adev); > adev->gfx.config.pa_sc_tile_steering_override = 0; > + > + /* Set whether texture coordinate truncation is conformant. */ > + tmp = RREG32_SOC15(GC, 0, regTA_CNTL2); > + adev->gfx.config.ta_cntl2_truncate_coord_mode = > + REG_GET_FIELD(tmp, TA_CNTL2, TRUNCATE_COORD_MODE); > + > /* Program DB_RING_CONTROL for multiple GFX pipes > * Default power up value is 1. > * Possible values: > -- > 2.43.0 >
