AMD General Ping..
> -----Original Message----- > From: Jesse Zhang <[email protected]> > Sent: Wednesday, July 22, 2026 11:21 AM > To: [email protected] > Cc: Deucher, Alexander <[email protected]>; Koenig, Christian > <[email protected]>; Zhang, Jesse(Jie) <[email protected]> > Subject: [PATCH v2 1/4] drm/amdgpu: track faulted gfx user-queue slots > > A gfx priv/bad-op fault IV carries only the HW slot (ring_id), not the > faulting user > queue's doorbell. Add userq_priv_fault_slots (an atomic bitmap of faulted > slots, so > concurrent faults are not dropped) and userq_priv_fault_work to struct > amdgpu_gfx; > a worker drains the bitmap and reads the doorbell back from each HQD to locate > and reset the queue. > > Signed-off-by: Jesse Zhang <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > index aefd4f03b443..f83afa7e0aa5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > @@ -535,6 +535,9 @@ struct amdgpu_gfx { > struct mutex userq_sch_mutex; > u64 userq_sch_req_count[MAX_XCP]; > bool userq_sch_inactive[MAX_XCP]; > + /* atomic bitmap of faulted gfx UQ slots (index = pipe | queue << 2) */ > + unsigned long userq_priv_fault_slots; > + struct work_struct userq_priv_fault_work; > unsigned long enforce_isolation_jiffies[MAX_XCP]; > unsigned long enforce_isolation_time[MAX_XCP]; > > -- > 2.49.0
