Add a new flag (AMDGPU_GEM_LIST_HANDLES_FLAG_IS_USERPTR) to the DRM_IOCTL_AMDGPU_GEM_LIST_CONTEXTS ioctl.
This is required to allow for checkpoint and restore of userptr objects. The existing struct drm_amdgpu_gem_list_handles_entry is used with the userptr creation flags places in alloc_flags, while the alignment field contains the userspace address. Signed-off-by: Tvrtko Ursulin <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 21 +++++++++++++++------ include/uapi/drm/amdgpu_drm.h | 14 ++++++++++---- 2 files changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 63fb4ea66a45..fad7bbd00edd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -1204,14 +1204,23 @@ int amdgpu_gem_list_handles_ioctl(struct drm_device *dev, void *data, bo_entry = &bo_entries[bo_index]; - bo_entry->size = amdgpu_bo_size(bo); - bo_entry->alloc_flags = bo->flags & AMDGPU_GEM_CREATE_SETTABLE_MASK; - bo_entry->preferred_domains = bo->preferred_domains; bo_entry->gem_handle = id; - bo_entry->alignment = bo->tbo.page_alignment; + bo_entry->size = amdgpu_bo_size(bo); + if (amdgpu_ttm_tt_is_userptr(bo->tbo.ttm)) { + u32 flags; - if (bo->tbo.base.import_attach) - bo_entry->flags |= AMDGPU_GEM_LIST_HANDLES_FLAG_IS_IMPORT; + bo_entry->flags = AMDGPU_GEM_LIST_HANDLES_FLAG_IS_USERPTR; + amdgpu_ttm_tt_get_userptr(&bo->tbo, &bo_entry->userptr, + &flags); + bo_entry->alloc_flags = flags; + } else { + bo_entry->alloc_flags = bo->flags & AMDGPU_GEM_CREATE_SETTABLE_MASK; + bo_entry->preferred_domains = bo->preferred_domains; + bo_entry->alignment = bo->tbo.page_alignment; + + if (bo->tbo.base.import_attach) + bo_entry->flags = AMDGPU_GEM_LIST_HANDLES_FLAG_IS_IMPORT; + } bo_index += 1; } diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index b32c72a662b6..9baa9a4b6b3d 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -838,6 +838,7 @@ struct drm_amdgpu_gem_op { }; #define AMDGPU_GEM_LIST_HANDLES_FLAG_IS_IMPORT (1 << 0) +#define AMDGPU_GEM_LIST_HANDLES_FLAG_IS_USERPTR (1 << 1) struct drm_amdgpu_gem_list_handles { /* User pointer to array of drm_amdgpu_gem_bo_info_entry */ @@ -853,7 +854,7 @@ struct drm_amdgpu_gem_list_handles_entry { /* gem handle of buffer object */ __u32 gem_handle; - /* Currently just one flag: IS_IMPORT */ + /* AMDGPU_GEM_LIST_HANDLES_FLAG_* */ __u32 flags; /* Size of bo */ @@ -862,11 +863,16 @@ struct drm_amdgpu_gem_list_handles_entry { /* Preferred domains for GEM_CREATE */ __u64 preferred_domains; - /* GEM_CREATE flags for re-creation of buffer */ + /* GEM_CREATE flags for re-creation of buffer or drm_amdgpu_gem_userptr.flags */ __u64 alloc_flags; - /* physical start_addr alignment in bytes for some HW requirements */ - __u64 alignment; + union { + /* physical start_addr alignment in bytes for some HW requirements */ + __u64 alignment; + + /* drm_amdgpu_gem_userptr.addr for userptr objects */ + __u64 userptr; + }; }; #define AMDGPU_VA_OP_MAP 1 -- 2.54.0
