This DC patchset brings improvements in multiple areas. In summary, we have:
- Reworked per-DPM derate handling: refactor the per-DPM derate logic, update derates with default per-DPM values, and move the soc_and_ip_translator onto the new per-DPM organization - DCN6 mode-support and UTM work: opt-out for the OutstandingRequests check, a utm_support capability flag, and a guard against an empty DCN6 UTM QoS table - More DMU/DMUB offload: send DPM0 clock values for Z8 retention, allow DCHVM<->rIOMMU SDP port disconnection on DCN42, and add the DC_BLS command - HWSS block-sequence cleanups: move periodic interrupt calculations to HWSS, drop pipe_ctx from HUBP_WAIT_FOR_DCC_META_PROP, use mpcc_id instead of the hubp instance, and add a wait stream regen event - DML updates: unify CalculateFlipSchedule logic and relax the frame size limit for the dcn5/6 core funcs files - clk_mgr refactor renaming carried DCE clock manager functions for dcn10, plus a missing-prototype build fix and a static DCN42 SOC BB struct - Expanded IGT/KUnit validation: CACP ACE curve area debugfs and cursor mode tests on disabled CRTCs - eDP fix to skip teardown while a forced PSR is active Cc: Daniel Wheeler <[email protected]> Austin Zheng (5): drm/amd/display: Make Struct In DCN42 SOC BB Header Static drm/amd/display: Refactor Per-DPM Derate Logic drm/amd/display: Update Derates And Set Default Per-DPM Derates drm/amd/display: Unify CalculateFlipSchedule Logic drm/amd/display: Update soc_and_ip_translator To Use Updated Per-DPM Derate Organization Chenyu Chen (1): drm/amd/display: Add CACP ACE curve area debugfs for IGT validation Dillon Varone (1): drm/amd/display: Rename carried dce clock manager functions for dcn10 Ivan Lipski (1): drm/amd/display: Relax frame size limit for dcn5/6 DML core funcs files James Lin (1): drm/amd/display: Add missing prototype for amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags Jun Lei (1): drm/amd/display: Add opt-out for DCN6 OutstandingRequests mode-support check Karthi Kandasamy (1): drm/amd/display: Skip eDP teardown while forced PSR is active Ovidiu Bunea (3): drm/amd/display: Add DC_BLS command drm/amd/display: Notify DMU to allow DCHVM<->rIOMMU SDP port disconnection for DCN42 drm/amd/display: Send DPM0 clock values to DMU Peichen Huang (1): drm/amd/display: add wait stream regen event Taimur Hassan (2): drm/amd/display: [FW Promotion] Release 0.1.71.0 drm/amd/display: Promote DC to 3.2.394 Tom Chung (2): drm/amd/display: set base.enable in cursor mode tests drm/amd/display: test native cursor mode on a disabled CRTC Tomasz Siemek (3): drm/amd/display: Move periodic interrupt calculations to HWSS drm/amd/display: Refactor HUBP_WAIT_FOR_DCC_META_PROP to drop pipe_ctx drm/amd/display: Use mpcc_id instead of hubp instance Wenjing Liu (2): drm/amd/display: Add utm_support capability flag drm/amd/display: Guard against empty DCN6 UTM QoS table .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 68 +++++++ .../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 2 + .../amdgpu_dm/tests/amdgpu_dm_cursor_test.c | 24 +++ .../display/dc/clk_mgr/dce100/dce_clk_mgr.c | 115 +++++++++++ .../display/dc/clk_mgr/dce100/dce_clk_mgr.h | 8 +- .../dc/clk_mgr/dce112/dce112_clk_mgr.c | 59 ++++++ .../dc/clk_mgr/dce112/dce112_clk_mgr.h | 4 +- .../display/dc/clk_mgr/dcn10/dcn10_clk_mgr.c | 14 +- .../display/dc/clk_mgr/dcn10/dcn10_clk_mgr.h | 12 +- .../display/dc/clk_mgr/dcn10/rv1_clk_mgr.c | 9 +- .../display/dc/clk_mgr/dcn10/rv2_clk_mgr.c | 6 +- .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 12 +- .../dc/clk_mgr/dcn201/dcn201_clk_mgr.c | 6 +- .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 5 +- .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 8 +- .../display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 8 +- .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 10 +- .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 10 +- .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 10 +- .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 10 +- .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 18 +- .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 12 +- .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 18 +- .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 26 ++- .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h | 5 + .../dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c | 11 +- .../display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c | 9 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +- .../drm/amd/display/dc/core/dc_hw_sequencer.c | 136 +++++++++---- drivers/gpu/drm/amd/display/dc/dc.h | 3 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 18 ++ drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 12 ++ .../gpu/drm/amd/display/dc/dml2_0/Makefile | 8 + .../dml21/inc/bounding_boxes/dcn42_soc_bb.h | 39 ++-- .../dml21/inc/bounding_boxes/dcn42b_soc_bb.h | 25 ++- .../dml21/inc/bounding_boxes/dcn4_soc_bb.h | 27 ++- .../dml21/inc/dml_top_display_cfg_types.h | 1 + .../dml21/inc/dml_top_soc_parameter_types.h | 44 ++++- .../src/dml2_core/dml2_core_dcn4_calcs.c | 183 +++++++----------- .../dml2_core_dcn6_funcs_mode_support.c | 7 + .../src/dml2_core/dml2_core_shared_types.h | 3 + .../dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 106 +++++++++- .../src/inc/dml2_internal_shared_types.h | 1 + .../display/dc/hubbub/dcn35/dcn35_hubbub.c | 7 + .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 7 +- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 60 ++---- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.h | 5 +- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 17 +- .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 8 +- .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 7 +- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 24 +-- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 3 +- .../amd/display/dc/hwss/dcn60/dcn60_hwseq.c | 8 +- .../drm/amd/display/dc/hwss/hw_sequencer.h | 23 ++- .../dc/resource/dcn60/dcn60_resource.c | 1 + .../dcn401/dcn401_soc_and_ip_translator.c | 6 +- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 39 ++++ .../drm/amd/display/modules/inc/mod_power.h | 1 + 58 files changed, 924 insertions(+), 412 deletions(-) -- 2.43.0
