From: Jiahao Li <[email protected]> - Adding a new interface in guest driver to parse the pf2vf message and return RAS capability to the caller when uniras is enabled
- Update RAS capability fields in amdgv_sriovmsg.h for uniras Signed-off-by: Jiahao Li <[email protected]> Reviewed-by: YiPeng Chai <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 39 +++++++++++++++++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 27 ++++++++++++-- 3 files changed, 63 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index b43fc643668d2..73169cb775f9c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -339,6 +339,41 @@ static int amdgpu_virt_ras_realloc_eh_data_space(struct amdgpu_device *adev, return 0; } +int amdgpu_virt_get_uniras_ras_caps(struct amdgpu_device *adev, + struct amd_sriov_uniras_caps *caps) +{ + struct amd_sriov_msg_pf2vf_info *pf2vf_msg; + + if (!adev || !caps) + return -EINVAL; + + if (!adev->virt.fw_reserve.p_pf2vf) + return -EINVAL; + + if (adev->virt.fw_reserve.p_pf2vf->version != AMD_SRIOV_MSG_FW_VRAM_PF2VF_VER) + return -EINVAL; + + pf2vf_msg = (struct amd_sriov_msg_pf2vf_info *)adev->virt.fw_reserve.p_pf2vf; + + if (pf2vf_msg->header.size > (AMD_SRIOV_MSG_SIZE_KB << 10) || + pf2vf_msg->header.size < + offsetof(struct amd_sriov_msg_pf2vf_info, pf2vf_ras_caps) + + sizeof(pf2vf_msg->pf2vf_ras_caps)) + return -EINVAL; + + if (!pf2vf_msg->feature_flags.flags.uniras_support) + return -EOPNOTSUPP; + + *caps = pf2vf_msg->pf2vf_ras_caps.uniras_caps; + + dev_dbg(adev->dev, + "uniras caps: ras_ext_ecc_type=0x%x ras_int_ecc_attributes=0x%x ras_en_block_mask=0x%llx\n", + caps->ras_ext_ecc_type, caps->ras_int_ecc_attributes, + caps->ras_en_block_mask); + + return 0; +} + static int amdgpu_virt_init_ras_err_handler_data(struct amdgpu_device *adev) { struct amdgpu_virt *virt = &adev->virt; @@ -614,9 +649,9 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev) if (amdgpu_sriov_is_unitid_support(adev)) adev->unitid = pf2vf->unitid; - adev->virt.ras_en_caps.all = pf2vf->ras_en_caps.all; + adev->virt.ras_en_caps.all = pf2vf->pf2vf_ras_caps.ras_en_caps.all; adev->virt.ras_telemetry_en_caps.all = - pf2vf->ras_telemetry_en_caps.all; + pf2vf->pf2vf_ras_caps.ras_telemetry_en_caps.all; break; default: dev_err(adev->dev, "invalid pf2vf version: 0x%x\n", pf2vf_info->version); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h index bcf7156a4a9e0..9957241bdf592 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h @@ -506,6 +506,8 @@ bool amdgpu_virt_get_rlcg_reg_access_flag(struct amdgpu_device *adev, u32 acc_flags, u32 hwip, bool write, u32 *rlcg_flag); u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id); +int amdgpu_virt_get_uniras_ras_caps(struct amdgpu_device *adev, + struct amd_sriov_uniras_caps *caps); bool amdgpu_virt_get_ras_capability(struct amdgpu_device *adev); int amdgpu_virt_req_ras_err_count(struct amdgpu_device *adev, enum amdgpu_ras_block block, struct ras_err_data *err_data); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h index 8cd26ba55e6c6..5a253d50faa76 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h @@ -164,7 +164,8 @@ union amd_sriov_msg_feature_flags { uint32_t xgmi_connected_to_cpu : 1; uint32_t ptl_support : 1; uint32_t unitid_support : 1; - uint32_t reserved : 16; + uint32_t uniras_support : 1; + uint32_t reserved : 15; } flags; uint32_t all; }; @@ -210,6 +211,27 @@ union amd_sriov_ras_caps { uint64_t all; }; +struct amd_sriov_uniras_caps { + uint32_t ras_ext_ecc_type; + uint32_t ras_int_ecc_attributes; + uint64_t ras_en_block_mask; +}; + +/* + * PF2VF RAS capability words (16 bytes, layout matches legacy fields): + * ras_ext_ecc_type and ras_int_ecc_attributes are aliases ras_en_caps, + * ras_en_block_mask aliases ras_telemetry_en_caps. + */ +union amd_sriov_msg_pf2vf_ras_caps { + /* ras caps for uniras enabled case */ + struct amd_sriov_uniras_caps uniras_caps; + /* ras caps for uniras disabled case*/ + struct { + union amd_sriov_ras_caps ras_en_caps; + union amd_sriov_ras_caps ras_telemetry_en_caps; + }; +}; + union amd_sriov_msg_os_info { struct { uint32_t windows : 1; @@ -314,8 +336,7 @@ struct amd_sriov_msg_pf2vf_info { /* vf bdf on host pci tree for debug only */ uint32_t bdf_on_host; uint32_t more_bp; //Reserved for future use. - union amd_sriov_ras_caps ras_en_caps; - union amd_sriov_ras_caps ras_telemetry_en_caps; + union amd_sriov_msg_pf2vf_ras_caps pf2vf_ras_caps; /* PTL status response for guest */ uint32_t ptl_enabled; // PTL enable status: 0=disabled, 1=enabled uint32_t ptl_pref_format1; // Current preferred format 1 -- 2.55.0
