From: Le Ma <[email protected]>

Add nps supported modes init for gc 12.1.0

Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c |  3 +++
 drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c | 33 ++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/gmc_v12_1.h |  1 +
 3 files changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index e69cae39b5f75..27f9f6a4f3fa4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -945,6 +945,9 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
        if (r)
                return r;
 
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0))
+               gmc_v12_1_init_nps_details(adev);
+
        /*
         * number of VMs
         * VMID 0 is reserved for System
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
index f9887cec9a6c3..a8e32ee93735d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
@@ -733,3 +733,36 @@ void gmc_v12_1_init_vram_info(struct amdgpu_device *adev)
        adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM4;
        adev->gmc.vram_width = 384 * 64;
 }
+
+void gmc_v12_1_init_nps_details(struct amdgpu_device *adev)
+{
+       enum amdgpu_memory_partition mode;
+       uint32_t supp_modes;
+       int i;
+
+       adev->gmc.supported_nps_modes = 0;
+
+       if (amdgpu_sriov_vf(adev) || (adev->flags & AMD_IS_APU))
+               return;
+
+       mode = amdgpu_gmc_get_memory_partition(adev, &supp_modes);
+
+       /* Mode detected by hardware and supported modes available */
+       if ((mode != UNKNOWN_MEMORY_PARTITION_MODE) && supp_modes) {
+               while ((i = ffs(supp_modes))) {
+                       if (AMDGPU_ALL_NPS_MASK & BIT(i))
+                               adev->gmc.supported_nps_modes |= BIT(i);
+                       supp_modes &= supp_modes - 1;
+               }
+       } else {
+               switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
+               case IP_VERSION(12, 1, 0):
+                       adev->gmc.supported_nps_modes =
+                               BIT(AMDGPU_NPS1_PARTITION_MODE) |
+                               BIT(AMDGPU_NPS2_PARTITION_MODE);
+                       break;
+               default:
+                       break;
+               }
+       }
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.h 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.h
index 2f08f4b8cd99e..22da84a1d5185 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.h
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.h
@@ -27,4 +27,5 @@
 void gmc_v12_1_set_gmc_funcs(struct amdgpu_device *adev);
 void gmc_v12_1_set_irq_funcs(struct amdgpu_device *adev);
 void gmc_v12_1_init_vram_info(struct amdgpu_device *adev);
+void gmc_v12_1_init_nps_details(struct amdgpu_device *adev);
 #endif
-- 
2.55.0

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