Check for both the MMIO and SDMA pathes.
Signed-off-by: Alex Deucher <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 779f9b0974d2e..8a975eddd75c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -724,6 +724,13 @@ void amdgpu_gmc_flush_gpu_tlb_gart(struct amdgpu_device
*adev,
struct amdgpu_job *job;
int r;
+ /*
+ * A GPU reset should flush all TLBs anyway, so no need to do
+ * this while one is ongoing.
+ */
+ if (!down_read_trylock(&adev->reset_domain->sem))
+ return;
+
ring = to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]);
switch (adev->gmc.gart_inv_method) {
@@ -738,13 +745,6 @@ void amdgpu_gmc_flush_gpu_tlb_gart(struct amdgpu_device
*adev,
if (!adev->mman.buffer_funcs_enabled ||
!adev->ib_pool_ready || !ring->sched.ready || use_mmio) {
- /*
- * A GPU reset should flush all TLBs anyway, so no need to do
- * this while one is ongoing.
- */
- if (!down_read_trylock(&adev->reset_domain->sem))
- return;
-
if (adev->gmc.flush_tlb_needs_extra_type_2)
adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0,
vmhub, 2);
@@ -778,11 +778,13 @@ void amdgpu_gmc_flush_gpu_tlb_gart(struct amdgpu_device
*adev,
dma_fence_wait(fence, false);
dma_fence_put(fence);
+ up_read(&adev->reset_domain->sem);
return;
error_alloc:
mutex_unlock(&adev->mman.default_entity.lock);
+ up_read(&adev->reset_domain->sem);
dev_err(adev->dev, "Error flushing GPU TLB using the SDMA (%d)!\n", r);
}
--
2.55.0