From: Dillon Varone <[email protected]> [WHY&HOW] RBBMIF timeout should not be disabled to prevent register access hang.
Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Hung <[email protected]> --- drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c index 38d587af9dd8..1e60b852e61f 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -3208,10 +3208,6 @@ void dcn20_fpga_init_hw(struct dc *dc) if (hws->funcs.enable_power_gating_plane) hws->funcs.enable_power_gating_plane(hws, true); - // Specific to FPGA dccg and registers - REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF); - REG_WRITE(RBBMIF_TIMEOUT_DIS_2, 0xFFFFFFFF); - dcn10_hubbub_global_timer_enable(dc->res_pool->hubbub, true, 2); if (hws->funcs.dccg_init) -- 2.43.0
