On 8/28/26 08:21, Yogesh Mohan Marimuthu wrote: > need to pad before __u64 tcc_disabled_mask variable. > > This patch fixes 64bit Kernel + 32 bit mesa combination. But at the same > time it will break 32bit Kernel(using this patch) + older 32bit mesa(not > using this patch). > > This issue was discussd with [email protected], > [email protected] and [email protected]. > Currently today 32 bit kernel + 32 bit userspace and 64 bit kernel and > 64 bit userspace work. Mixed 64 bit kernel and 32 bit userspace is > currently broken. Since 32 bit kernel and userspace is probably pretty > rare these days and the data affected by this is not critical, Hence > we can go ahead with this patch. > > Signed-off-by: Yogesh Mohan Marimuthu <[email protected]>
We need CC: stable and a Fixes tag. Reviewed-by: Christian König <[email protected]> > --- > include/uapi/drm/amdgpu_drm.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h > index 0a113529b..5beef3eaa 100644 > --- a/include/uapi/drm/amdgpu_drm.h > +++ b/include/uapi/drm/amdgpu_drm.h > @@ -1517,6 +1517,7 @@ struct drm_amdgpu_info_device { > __u64 high_va_max; > /* gfx10 pa_sc_tile_steering_override */ > __u32 pa_sc_tile_steering_override; > + __u32 pad; > /* disabled TCCs */ > __u64 tcc_disabled_mask; > __u64 min_engine_clock; > @@ -1541,7 +1542,6 @@ struct drm_amdgpu_info_device { > __u32 csa_alignment; > /* Userq IP mask (1 << AMDGPU_HW_IP_*) */ > __u32 userq_ip_mask; > - __u32 pad; > }; > > struct drm_amdgpu_info_hw_ip {
