From: Fangzhi Zuo <[email protected]>

[Why & How]
The HDMI Forum VSDB reports the maximum DSC color depth a sink supports.
This maximum is cumulative: a sink that reports 12 bpc also supports 10
and 8 bpc.

The previous code used exact "== 10" and "== 12" comparisons chained with
else-if, so a 12 bpc sink only set frl_dsc_12bpc and never set
frl_dsc_10bpc, incorrectly narrowing the DSC bpc range usable with that
sink.

Use ">= 10" and a separate ">= 12" check so a sink advertising a higher
maximum also enables the lower DSC bit depths it supports.

Reviewed-by: Alex Hung <[email protected]>
Signed-off-by: Fangzhi Zuo <[email protected]>
Signed-off-by: Ray Wu <[email protected]>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c    | 5 +++--
 .../drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 93fd5f251a6c..836c06772a68 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -1228,9 +1228,10 @@ void populate_hdmi_info_from_connector(bool enable_frl, 
struct drm_hdmi_info *hd
                edid_caps->max_frl_rate = get_max_frl_rate(hdmi->max_lanes, 
hdmi->max_frl_rate_per_lane);
                edid_caps->frl_dsc_support = hdmi->dsc_cap.v_1p2;
                if (edid_caps->frl_dsc_support) {
-                       if (hdmi->dsc_cap.bpc_supported == 10)
+                       /* HF-VSDB DSC max bpc is cumulative: >=12 implies 10 
and 8. */
+                       if (hdmi->dsc_cap.bpc_supported >= 10)
                                edid_caps->frl_dsc_10bpc = true;
-                       else if (hdmi->dsc_cap.bpc_supported == 12)
+                       if (hdmi->dsc_cap.bpc_supported >= 12)
                                edid_caps->frl_dsc_12bpc = true;
                        edid_caps->frl_dsc_all_bpp = hdmi->dsc_cap.all_bpp;
                        edid_caps->frl_dsc_native_420 = 
hdmi->dsc_cap.native_420;
diff --git 
a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c
index d4232648d8e6..ceedb8745267 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c
@@ -982,7 +982,7 @@ static void dm_test_populate_hdmi_frl_dsc_12bpc(struct 
kunit *test)
 
        KUNIT_EXPECT_EQ(test, caps->max_frl_rate, 2);
        KUNIT_EXPECT_TRUE(test, caps->frl_dsc_support);
-       KUNIT_EXPECT_FALSE(test, caps->frl_dsc_10bpc);
+       KUNIT_EXPECT_TRUE(test, caps->frl_dsc_10bpc);
        KUNIT_EXPECT_TRUE(test, caps->frl_dsc_12bpc);
        KUNIT_EXPECT_EQ(test, caps->frl_dsc_max_slices, 7);
        KUNIT_EXPECT_EQ(test, caps->frl_dsc_max_frl_rate, 1);
-- 
2.43.0

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