AMD General Ping ...
> -----Original Message----- > From: Jesse Zhang <[email protected]> > Sent: Monday, August 31, 2026 1:24 PM > To: [email protected] > Cc: Deucher, Alexander <[email protected]>; Koenig, Christian > <[email protected]>; Zhang, Jesse(Jie) <[email protected]> > Subject: [PATCH V3 01/10] drm/amdgpu/mes_userqueue: refactor mqd_update into > per-IP helpers > > Split the inlined compute path out of mes_userq_mqd_update() into > mes_userq_compute_mqd_update() and turn the former into a dispatcher that > switches on queue_type, giving other IPs an obvious place to hook in. > > No functional change. > > Signed-off-by: Jesse Zhang <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 22 +++++++++++++++------- > 1 file changed, 15 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c > b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c > index ad72ced472dd..82bb4369451e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c > +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c > @@ -681,7 +681,8 @@ static int mes_userq_mqd_create(struct > amdgpu_usermode_queue *queue, > return r; > } > > -static int mes_userq_mqd_update(struct amdgpu_usermode_queue *queue, struct > drm_amdgpu_userq_in *args_in) > +static int mes_userq_compute_mqd_update(struct amdgpu_usermode_queue > *queue, > + struct drm_amdgpu_userq_in *args_in) > { > int retval = 0; > struct amdgpu_device *adev = queue->userq_mgr->adev; @@ -689,12 > +690,6 @@ static int mes_userq_mqd_update(struct amdgpu_usermode_queue > *queue, struct drm_ > struct amdgpu_mqd *mqd_hw_default = &adev->mqds[queue- > >queue_type]; > struct drm_amdgpu_userq_mqd_compute_gfx11 *compute_mqd_v11; > > - if (!queue || !userq_props) > - return -EINVAL; > - > - if (queue->queue_type != AMDGPU_HW_IP_COMPUTE) > - return -EINVAL; > - > if (args_in->mqd_size != sizeof(*compute_mqd_v11)) { > DRM_ERROR("Invalid compute IP MQD size\n"); > return -EINVAL; > @@ -720,6 +715,19 @@ static int mes_userq_mqd_update(struct > amdgpu_usermode_queue *queue, struct drm_ > return retval; > } > > +static int mes_userq_mqd_update(struct amdgpu_usermode_queue *queue, > +struct drm_amdgpu_userq_in *args_in) { > + if (!queue || !queue->userq_prop) > + return -EINVAL; > + > + switch (queue->queue_type) { > + case AMDGPU_HW_IP_COMPUTE: > + return mes_userq_compute_mqd_update(queue, args_in); > + default: > + return -EINVAL; > + } > +} > + > static void mes_userq_mqd_destroy(struct amdgpu_usermode_queue *queue) { > > -- > 2.49.0
