amdgpu_ras_late_init() sends the MCA configuration to PMFW, but it runs before RAS is ready on a device that still needs a hive reset, so the request is dropped and CE polling stays disabled. A reset loses the setting too, since PMFW is reloaded and nothing programs it again.
Apply it from amdgpu_ras_mgr_hw_init(), which covers modprobe and the deferred bring up, and from amdgpu_ras_resume(), which covers GPU reset and resume from suspend. Drop it from amdgpu_ras_late_init(). The control is absent on some parts, so its result must not fail hw_init. Signed-off-by: Xiang Liu <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 ++++--- drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 3 +++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index becad704113c..9ba48eef1349 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -3897,6 +3897,7 @@ static void amdgpu_ras_block_late_fini_default(struct amdgpu_device *adev, void amdgpu_ras_resume(struct amdgpu_device *adev) { struct amdgpu_ras *con = amdgpu_ras_get_context(adev); + struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev); struct ras_manager *obj, *tmp; if (!adev->ras_enabled || !con) { @@ -3906,6 +3907,9 @@ void amdgpu_ras_resume(struct amdgpu_device *adev) return; } + if (ras_mgr) + amdgpu_ras_mgr_set_debug_mode(adev, ras_mgr->is_debug_mode); + if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) { /* Set up all other IPs which are not implemented. There is a * tricky thing that IP's actual ras error type should be @@ -3966,9 +3970,6 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev) if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_ras_telemetry_en(adev)) return 0; - if (amdgpu_uniras_enabled(adev)) - amdgpu_ras_mgr_set_debug_mode(adev, false); - list_for_each_entry_safe(node, tmp, &adev->ras_list, node) { obj = node->ras_obj; if (!obj) { diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c index a02167397ce2..a10d8991d131 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c @@ -448,6 +448,9 @@ static int amdgpu_ras_mgr_hw_init(struct amdgpu_ip_block *ip_block) ras_mgr->ras_is_ready = true; + /* the control is absent on some parts, so it must not fail hw_init */ + amdgpu_ras_mgr_set_debug_mode(adev, ras_mgr->is_debug_mode); + amdgpu_enable_uniras(adev, true); RAS_DEV_INFO(adev, "AMDGPU RAS Is Ready.\n"); -- 2.34.1
