[PATCH 2/2] drm/amd/ras: add ras command to query partition info

[YiPeng Chai]

Add ras command to query partition info.

Signed-off-by: YiPeng Chai <yipeng.c...@amd.com>
---
 drivers/gpu/drm/amd/ras/core/cmd.c            | 26 +++++++++++++++++++
 drivers/gpu/drm/amd/ras/core/cmd.h            | 13 ++++++++++
 drivers/gpu/drm/amd/ras/core/ras.h            |  3 +++
 .../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c  |  8 ++++++
 4 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/amd/ras/core/cmd.c 
b/drivers/gpu/drm/amd/ras/core/cmd.c
index 9f874800f38d..1f045d47fc3b 100644
--- a/drivers/gpu/drm/amd/ras/core/cmd.c
+++ b/drivers/gpu/drm/amd/ras/core/cmd.c
@@ -451,6 +451,31 @@ static int ras_cmd_get_ras_cap(struct ras_core_context 
*ras_core,
        return 0;
 }
 
+static int ras_cmd_get_partition_info(struct ras_core_context *ras_core,
+       struct ras_cmd_ctx *cmd, void *data)
+{
+       struct ras_cmd_get_partition_info_rsp *output_data =
+                       (struct ras_cmd_get_partition_info_rsp 
*)cmd->output_buff_raw;
+       struct device_system_info sys_info = {0};
+
+       if ((cmd->input_size != sizeof(struct ras_cmd_get_partition_info_req)) 
||
+               (cmd->output_buf_size < sizeof(*output_data)))
+               return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
+
+       memset(output_data, 0, sizeof(*output_data));
+
+       if (ras_core_get_device_system_info(ras_core, &sys_info))
+               return RAS_CMD__ERROR_GENERIC;
+
+       output_data->nps_mode = sys_info.nps_mode;
+       output_data->xcp_mode = sys_info.xcp_mode;
+
+       output_data->version = 0;
+       cmd->output_size = sizeof(*output_data);
+
+       return RAS_CMD__SUCCESS;
+}
+
 static struct ras_cmd_func_map ras_cmd_maps[] = {
        {RAS_CMD__INJECT_ERROR, ras_cmd_inject_error},
        {RAS_CMD__GET_BLOCK_ECC_STATUS, ras_get_block_ecc_info},
@@ -462,6 +487,7 @@ static struct ras_cmd_func_map ras_cmd_maps[] = {
        {RAS_CMD__GET_BATCH_TRACE_SNAPSHOT, ras_cmd_get_batch_trace_snapshot},
        {RAS_CMD__GET_BATCH_TRACE_RECORD, ras_cmd_get_batch_trace_records},
        {RAS_CMD__GET_RAS_CAP, ras_cmd_get_ras_cap},
+       {RAS_CMD__GET_PARTITION_INFO, ras_cmd_get_partition_info},
 };
 
 int rascore_handle_cmd(struct ras_core_context *ras_core,
diff --git a/drivers/gpu/drm/amd/ras/core/cmd.h 
b/drivers/gpu/drm/amd/ras/core/cmd.h
index d3f5ec3c8e5c..79a713e0b785 100644
--- a/drivers/gpu/drm/amd/ras/core/cmd.h
+++ b/drivers/gpu/drm/amd/ras/core/cmd.h
@@ -78,6 +78,7 @@ enum ras_cmd_id {
        RAS_CMD__CHECK_ADDRESS_VALIDITY,
        RAS_CMD__CONVERT_RETIRED_ADDRESS,
        RAS_CMD__GET_RAS_CAP,
+       RAS_CMD__GET_PARTITION_INFO,
        RAS_CMD__SUPPORTED_MAX = RAS_CMD_ID_COMMON_END,
 };
 
@@ -492,6 +493,18 @@ struct ras_cmd_get_ras_cap_rsp {
        uint32_t reserved[8];
 };
 
+struct ras_cmd_get_partition_info_req {
+       struct ras_cmd_dev_handle dev;
+       uint32_t reserved[4];
+};
+
+struct ras_cmd_get_partition_info_rsp {
+       uint32_t version;
+       uint32_t nps_mode;
+       int32_t xcp_mode;
+       uint32_t reserved[7];
+};
+
 #pragma pack(pop)
 
 int ras_cmd_init(struct ras_core_context *ras_core);
diff --git a/drivers/gpu/drm/amd/ras/core/ras.h 
b/drivers/gpu/drm/amd/ras/core/ras.h
index 5f133f3a8277..c21342fed32c 100644
--- a/drivers/gpu/drm/amd/ras/core/ras.h
+++ b/drivers/gpu/drm/amd/ras/core/ras.h
@@ -250,6 +250,9 @@ struct device_system_info {
        uint32_t vendor_id;
        uint32_t socket_id;
        uint64_t unique_id;
+       uint32_t nps_mode;
+       int xcp_mode;
+       int vram_type;
 };
 
 enum gpu_mem_type {
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c 
b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c
index dd8cdc2811f8..1bbbc383e373 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c
@@ -228,6 +228,14 @@ static int amdgpu_ras_sys_get_device_system_info(struct 
ras_core_context *ras_co
        dev_info->socket_id = adev->smuio.funcs->get_socket_id(adev);
        dev_info->unique_id = adev->unique_id;
 
+       dev_info->xcp_mode = AMDGPU_UNKNOWN_COMPUTE_PARTITION_MODE;
+       if (adev->nbio.funcs && adev->nbio.funcs->get_compute_partition_mode)
+               dev_info->xcp_mode = 
adev->nbio.funcs->get_compute_partition_mode(adev);
+
+       dev_info->nps_mode = amdgpu_gmc_query_memory_partition(adev);
+
+       dev_info->vram_type = adev->gmc.vram_type;
+
        return 0;
 }
 
-- 
2.43.0