Applied. Thanks!
On Tue, Sep 15, 2026 at 9:21 AM Ruslan Vagner <[email protected]> wrote: > > Fix the spelling in comments. No functional change. > > Signed-off-by: Ruslan Vagner <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 2 +- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c | 2 +- > .../amd/display/dc/dml2_0/dml21/dml21_translation_helper.c | 2 +- > drivers/gpu/drm/radeon/radeon_fence.c | 4 ++-- > 6 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index d53259a5b82f..acafa8c59cc9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -532,7 +532,7 @@ static int amdgpu_ctx_query(struct amdgpu_device *adev, > out->state.flags = 0x0; > out->state.hangs = 0x0; > > - /* determine if a GPU reset has occured since the last call */ > + /* determine if a GPU reset has occurred since the last call */ > reset_counter = atomic_read(&adev->gpu_reset_counter); > /* TODO: this should ideally return NO, GUILTY, or INNOCENT. */ > if (ctx->reset_counter_query == reset_counter) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c > index 8a2d64f0ebc3..f8be73e5fec9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c > @@ -228,12 +228,12 @@ void amdgpu_pasid_free_delayed(struct dma_resv *resv, > */ > > /** > - * amdgpu_vmid_had_gpu_reset - check if reset occured since last use > + * amdgpu_vmid_had_gpu_reset - check if reset occurred since last use > * > * @adev: amdgpu_device pointer > * @id: VMID structure > * > - * Check if GPU reset occured since last use of the VMID. > + * Check if GPU reset occurred since last use of the VMID. > */ > bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, > struct amdgpu_vmid *id) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h > index 44fe40f9e8df..57bd34981be0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h > @@ -31,7 +31,7 @@ > #define AMDGPU_PREAMBLE_IB_PRESENT (1 << 0) > /* bit set means preamble IB is first presented in belonging context */ > #define AMDGPU_PREAMBLE_IB_PRESENT_FIRST (1 << 1) > -/* bit set means context switch occured */ > +/* bit set means context switch occurred */ > #define AMDGPU_HAVE_CTX_SWITCH (1 << 2) > /* bit set means IB is preempted */ > #define AMDGPU_IB_PREEMPTED (1 << 3) > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c > b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c > index 5bc3bc60a2ac..ebbe7900205e 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c > @@ -46,7 +46,7 @@ static void dcn20_wait_for_vmid_ready(struct dcn20_vmid > *vmid) > /* According the hardware spec, we need to poll for the lowest > * bit of PAGE_TABLE_BASE_ADDR_LO32 = 1 any time a GPUVM > * context is updated. We can't use REG_WAIT here since we > - * don't have a seperate field to wait on. > + * don't have a separate field to wait on. > * > * TODO: Confirm timeout / poll interval with hardware team > */ > diff --git > a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c > b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c > index 1b0d55e2d7b0..1c9a3fe0f64c 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c > +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c > @@ -977,7 +977,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const > struct dc *in_dc, struct dc_s > > void dml21_copy_clocks_to_dc_state(struct dml2_context *in_ctx, > struct dc_state *context) > { > - /* TODO these should be the max of active, svp prefetch and idle > should be tracked seperately */ > + /* TODO these should be the max of active, svp prefetch and idle > should be tracked separately */ > context->bw_ctx.bw.dcn.clk.dispclk_khz = > in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dispclk_khz; > context->bw_ctx.bw.dcn.clk.dcfclk_khz = > in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.dcfclk_khz; > context->bw_ctx.bw.dcn.clk.dramclk_khz = > in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.uclk_khz; > diff --git a/drivers/gpu/drm/radeon/radeon_fence.c > b/drivers/gpu/drm/radeon/radeon_fence.c > index 299865569252..8e9402b8811b 100644 > --- a/drivers/gpu/drm/radeon/radeon_fence.c > +++ b/drivers/gpu/drm/radeon/radeon_fence.c > @@ -191,7 +191,7 @@ static int > radeon_fence_check_signaled(wait_queue_entry_t *wait, > * @ring: ring index the fence is associated with > * > * Checks the current fence value and calculates the last > - * signalled fence value. Returns true if activity occured > + * signalled fence value. Returns true if activity occurred > * on the ring, and the fence_queue should be waken up. > */ > static bool radeon_fence_activity(struct radeon_device *rdev, int ring) > @@ -262,7 +262,7 @@ static bool radeon_fence_activity(struct > radeon_device *rdev, int ring) > * @work: delayed work item > * > * Checks for fence activity and if there is none probe > - * the hardware if a lockup occured. > + * the hardware if a lockup occurred. > */ > static void radeon_fence_check_lockup(struct work_struct *work) > { > -- > 2.54.0.windows.1
