It's not required for compute only part
Signed-off-by: Harish Kasiviswanathan <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 94 +-------------------------
1 file changed, 2 insertions(+), 92 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index d7effa43c0fa..9677f91ef20c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -41,7 +41,6 @@
#include "ivsrcid/gfx/irqsrcs_gfx_12_1_0.h"
#include "soc15.h"
-#include "clearstate_gfx12.h"
#include "v12_structs.h"
#include "gfx_v12_1.h"
#include "mes_v12_1.h"
@@ -447,62 +446,8 @@ static int gfx_v12_1_init_microcode(struct amdgpu_device
*adev)
return err;
}
-static u32 gfx_v12_1_get_csb_size(struct amdgpu_device *adev)
-{
- u32 count = 0;
- const struct cs_section_def *sect = NULL;
- const struct cs_extent_def *ext = NULL;
-
- count += 1;
-
- for (sect = gfx12_cs_data; sect->section != NULL; ++sect) {
- if (sect->id == SECT_CONTEXT) {
- for (ext = sect->section; ext->extent != NULL; ++ext)
- count += 2 + ext->reg_count;
- } else
- return 0;
- }
-
- return count;
-}
-
-static void gfx_v12_1_get_csb_buffer(struct amdgpu_device *adev, u32 *buffer)
-{
- u32 count = 0, clustercount = 0, i;
- const struct cs_section_def *sect = NULL;
- const struct cs_extent_def *ext = NULL;
-
- if (adev->gfx.rlc.cs_data == NULL)
- return;
- if (buffer == NULL)
- return;
-
- count += 1;
-
- for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) {
- if (sect->id == SECT_CONTEXT) {
- for (ext = sect->section; ext->extent != NULL; ++ext) {
- clustercount++;
- buffer[count++] = ext->reg_count;
- buffer[count++] = ext->reg_index;
-
- for (i = 0; i < ext->reg_count; i++)
- buffer[count++] =
cpu_to_le32(ext->extent[i]);
- }
- } else
- return;
- }
-
- buffer[0] = clustercount;
-}
-
static void gfx_v12_1_rlc_fini(struct amdgpu_device *adev)
{
- /* clear state block */
- amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,
- &adev->gfx.rlc.clear_state_gpu_addr,
- (void **)&adev->gfx.rlc.cs_ptr);
-
/* jump table block */
amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,
&adev->gfx.rlc.cp_table_gpu_addr,
@@ -543,19 +488,7 @@ static void gfx_v12_1_init_rlcg_reg_access_ctrl(struct
amdgpu_device *adev)
static int gfx_v12_1_rlc_init(struct amdgpu_device *adev)
{
- const struct cs_section_def *cs_data;
- int r, i, num_xcc;
-
- adev->gfx.rlc.cs_data = gfx12_cs_data;
-
- cs_data = adev->gfx.rlc.cs_data;
-
- if (cs_data) {
- /* init clear state block */
- r = amdgpu_gfx_rlc_init_csb(adev);
- if (r)
- return r;
- }
+ int i, num_xcc;
/* init spm vmid with 0xf */
num_xcc = NUM_XCC(adev->gfx.xcc_mask);
@@ -1618,21 +1551,6 @@ static void
gfx_v12_1_xcc_enable_gui_idle_interrupt(struct amdgpu_device *adev,
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp);
}
-static int gfx_v12_1_xcc_init_csb(struct amdgpu_device *adev,
- int xcc_id)
-{
- adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);
-
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CSIB_ADDR_HI,
- adev->gfx.rlc.clear_state_gpu_addr >> 32);
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CSIB_ADDR_LO,
- adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
- WREG32_SOC15(GC, GET_INST(GC, xcc_id),
- regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);
-
- return 0;
-}
-
static void gfx_v12_1_xcc_rlc_stop(struct amdgpu_device *adev,
int xcc_id)
{
@@ -1837,15 +1755,11 @@ static int gfx_v12_1_xcc_rlc_resume(struct
amdgpu_device *adev,
int r;
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
- gfx_v12_1_xcc_init_csb(adev, xcc_id);
-
if (!amdgpu_sriov_vf(adev)) /* enable RLC SRM */
gfx_v12_1_xcc_rlc_enable_srm(adev, xcc_id);
} else {
- if (amdgpu_sriov_vf(adev)) {
- gfx_v12_1_xcc_init_csb(adev, xcc_id);
+ if (amdgpu_sriov_vf(adev))
return 0;
- }
gfx_v12_1_xcc_rlc_stop(adev, xcc_id);
@@ -1862,8 +1776,6 @@ static int gfx_v12_1_xcc_rlc_resume(struct amdgpu_device
*adev,
return r;
}
- gfx_v12_1_xcc_init_csb(adev, xcc_id);
-
gfx_v12_1_xcc_rlc_start(adev, xcc_id);
}
@@ -2919,8 +2831,6 @@ static const struct amdgpu_rlc_funcs gfx_v12_1_rlc_funcs
= {
.set_safe_mode = gfx_v12_1_xcc_set_safe_mode,
.unset_safe_mode = gfx_v12_1_xcc_unset_safe_mode,
.init = gfx_v12_1_rlc_init,
- .get_csb_size = gfx_v12_1_get_csb_size,
- .get_csb_buffer = gfx_v12_1_get_csb_buffer,
.resume = gfx_v12_1_rlc_resume,
.stop = gfx_v12_1_rlc_stop,
.reset = gfx_v12_1_rlc_reset,
--
2.43.0
