From: Piotr Maziarz <[email protected]> [WHY] opp2_set_disp_pattern_generator read debug.disable_dynamic_expansion_for_test_pattern through opp->ctx->dc while the sequence was executing. A block sequence operation must take its inputs from a flat parameter list resolved during the build phase, so this hid an input from the recorded sequence and left the FMT_DYNAMIC_EXP_CNTL branch unreachable from the OPP unit tests.
[HOW] Added disable_dyn_exp_for_test_pattern to opp_funcs::opp_set_disp_pattern_generator and to opp_set_disp_pattern_generator_params, and updated every caller to pass dc->debug.disable_dynamic_expansion_for_test_pattern explicitly. Updated the unit test mocks and the core_gtest dumper, and extended opp_gtest to cover both values of the new flag. Signed-off-by: Piotr Maziarz <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Reviewed-by: Alvin Lee <[email protected]> --- .../drm/amd/display/dc/core/dc_hw_sequencer.c | 38 ++++++++++++------- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 10 +++-- .../amd/display/dc/hwss/dcn201/dcn201_hwseq.c | 3 +- .../amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 4 +- .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 6 ++- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 9 +++-- .../drm/amd/display/dc/hwss/hw_sequencer.h | 4 +- drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | 3 +- .../drm/amd/display/dc/opp/dcn20/dcn20_opp.c | 5 ++- .../drm/amd/display/dc/opp/dcn20/dcn20_opp.h | 3 +- 10 files changed, 54 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c index 28897addb553..e1d6e31af657 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c @@ -3537,10 +3537,12 @@ void hwss_opp_set_disp_pattern_generator(union block_sequence_params *params) int width = params->opp_set_disp_pattern_generator_params.width; int height = params->opp_set_disp_pattern_generator_params.height; int offset = params->opp_set_disp_pattern_generator_params.offset; + bool disable_dyn_exp = + params->opp_set_disp_pattern_generator_params.disable_dyn_exp_for_test_pattern; if (opp && opp->funcs->opp_set_disp_pattern_generator) { opp->funcs->opp_set_disp_pattern_generator(opp, test_pattern, color_space, - color_depth, solid_color, width, height, offset); + color_depth, solid_color, width, height, offset, disable_dyn_exp); } } @@ -4862,19 +4864,27 @@ void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_st bool use_solid_color, int width, int height, - int offset) -{ - if (*seq_state->num_steps < MAX_HWSS_BLOCK_SEQUENCE_SIZE) { - seq_state->steps[*seq_state->num_steps].func = OPP_SET_DISP_PATTERN_GENERATOR; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.opp = opp; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.test_pattern = test_pattern; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.color_space = color_space; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.color_depth = color_depth; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.solid_color = solid_color; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.use_solid_color = use_solid_color; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.width = width; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.height = height; - seq_state->steps[*seq_state->num_steps].params.opp_set_disp_pattern_generator_params.offset = offset; + int offset, + bool disable_dyn_exp_for_test_pattern) +{ + if (*seq_state->num_steps < MAX_HWSS_BLOCK_SEQUENCE_SIZE) { + struct block_sequence *step = &seq_state->steps[*seq_state->num_steps]; + union block_sequence_params *step_params = &step->params; + struct opp_set_disp_pattern_generator_params *pattern_params = + &step_params->opp_set_disp_pattern_generator_params; + + step->func = OPP_SET_DISP_PATTERN_GENERATOR; + pattern_params->opp = opp; + pattern_params->test_pattern = test_pattern; + pattern_params->color_space = color_space; + pattern_params->color_depth = color_depth; + pattern_params->solid_color = solid_color; + pattern_params->use_solid_color = use_solid_color; + pattern_params->width = width; + pattern_params->height = height; + pattern_params->offset = offset; + pattern_params->disable_dyn_exp_for_test_pattern = + disable_dyn_exp_for_test_pattern; (*seq_state->num_steps)++; } } diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c index 45a4a7707507..f408589072d7 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -458,7 +458,8 @@ void dcn20_init_blank( &black_color, otg_active_width, otg_active_height, - 0); + 0, + dc->debug.disable_dynamic_expansion_for_test_pattern); if (num_opps == 2) { bottom_opp->funcs->opp_set_disp_pattern_generator( @@ -469,7 +470,8 @@ void dcn20_init_blank( &black_color, otg_active_width, otg_active_height, - 0); + 0, + dc->debug.disable_dynamic_expansion_for_test_pattern); } hws->funcs.wait_for_blank_complete(opp); @@ -3339,7 +3341,7 @@ void dcn20_set_disp_pattern_generator(const struct dc *dc, const struct tg_color *solid_color, int width, int height, int offset) { - (void)dc; pipe_ctx->stream_res.opp->funcs->opp_set_disp_pattern_generator(pipe_ctx->stream_res.opp, test_pattern, - color_space, color_depth, solid_color, width, height, offset); + color_space, color_depth, solid_color, width, height, offset, + dc->debug.disable_dynamic_expansion_for_test_pattern); } diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c index c22587188c98..d34f63432c6b 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c @@ -214,7 +214,8 @@ void dcn201_init_blank( &black_color, otg_active_width, otg_active_height, - 0); + 0, + dc->debug.disable_dynamic_expansion_for_test_pattern); hws->funcs.wait_for_blank_complete(opp); } diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c index 79f40b483caf..35d5cce0a791 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c @@ -1245,9 +1245,9 @@ void dcn30_set_disp_pattern_generator(const struct dc *dc, const struct tg_color *solid_color, int width, int height, int offset) { - (void)dc; pipe_ctx->stream_res.opp->funcs->opp_set_disp_pattern_generator(pipe_ctx->stream_res.opp, test_pattern, - color_space, color_depth, solid_color, width, height, offset); + color_space, color_depth, solid_color, width, height, offset, + dc->debug.disable_dynamic_expansion_for_test_pattern); } void dcn30_prepare_bandwidth(struct dc *dc, diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c index 5de38b86cb54..8e45ad4191c7 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -1754,7 +1754,8 @@ void dcn32_init_blank( &black_color, otg_active_width, otg_active_height, - 0); + 0, + dc->debug.disable_dynamic_expansion_for_test_pattern); if (num_opps == 2) { if (bottom_opp && bottom_opp->funcs->opp_set_disp_pattern_generator) { @@ -1766,7 +1767,8 @@ void dcn32_init_blank( &black_color, otg_active_width, otg_active_height, - 0); + 0, + dc->debug.disable_dynamic_expansion_for_test_pattern); hws->funcs.wait_for_blank_complete(bottom_opp); } } diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c index 1d53240cd736..c82f941f42ec 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c @@ -2575,7 +2575,8 @@ void dcn401_program_pipe_sequence( false, pipe_ctx->stream_res.test_pattern_params.width, pipe_ctx->stream_res.test_pattern_params.height, - pipe_ctx->stream_res.test_pattern_params.offset); + pipe_ctx->stream_res.test_pattern_params.offset, + dc->debug.disable_dynamic_expansion_for_test_pattern); } if (pipe_ctx->plane_state @@ -3364,7 +3365,8 @@ void dcn401_blank_pixel_data_sequence( true, odm_slice_src.width, odm_slice_src.height, - odm_slice_src.x); + odm_slice_src.x, + dc->debug.disable_dynamic_expansion_for_test_pattern); odm_pipe = odm_pipe->next_odm_pipe; } @@ -3381,7 +3383,8 @@ void dcn401_blank_pixel_data_sequence( true, odm_slice_src.width, odm_slice_src.height, - odm_slice_src.x); + odm_slice_src.x, + dc->debug.disable_dynamic_expansion_for_test_pattern); /* Handle ABM level setting when not blanking */ if (!blank) { diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h index 7c5f88bf44c7..d7ab21c5a1e4 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h @@ -429,6 +429,7 @@ struct opp_set_disp_pattern_generator_params { int width; int height; int offset; + bool disable_dyn_exp_for_test_pattern; }; struct set_abm_pipe_params { @@ -2349,7 +2350,8 @@ void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_st bool use_solid_color, int width, int height, - int offset); + int offset, + bool disable_dyn_exp_for_test_pattern); void hwss_add_opp_program_bit_depth_reduction(struct block_sequence_state *seq_state, struct output_pixel_processor *opp, diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h index f2d16d88b0bc..73aaa2629315 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h @@ -340,7 +340,8 @@ struct opp_funcs { const struct tg_color *solid_color, int width, int height, - int offset); + int offset, + bool disable_dyn_exp_for_test_pattern); void (*opp_program_dpg_dimensions)( struct output_pixel_processor *opp, diff --git a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c index 8486175a3b56..544ff2bf7100 100644 --- a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c +++ b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c @@ -47,7 +47,8 @@ void opp2_set_disp_pattern_generator( const struct tg_color *solid_color, int width, int height, - int offset) + int offset, + bool disable_dyn_exp_for_test_pattern) { struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp); enum test_pattern_color_format bit_depth; @@ -89,7 +90,7 @@ void opp2_set_disp_pattern_generator( break; } - if (opp->ctx->dc->debug.disable_dynamic_expansion_for_test_pattern) { + if (disable_dyn_exp_for_test_pattern) { switch (test_pattern) { case CONTROLLER_DP_TEST_PATTERN_COLORSQUARES: case CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA: diff --git a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h index 8944fa6c8f79..62e8d5078ffb 100644 --- a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h +++ b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h @@ -152,7 +152,8 @@ void opp2_set_disp_pattern_generator( const struct tg_color *solid_color, int width, int height, - int offset); + int offset, + bool disable_dyn_exp_for_test_pattern); void opp2_program_dpg_dimensions( struct output_pixel_processor *opp, -- 2.53.0
