On 29-09-2026 05:24 pm, Christian König wrote:
On 9/28/26 20:57, Sunil Khatri wrote:
The SPM (Streaming Performance Monitor) path needs a VMID that is
isolated from other GPU contexts. Introduce vm_manager.spm_vmid to let a
GFXHUB dedicate a VMID to SPM.
When spm_vmid is set, remove that VMID from the MES user-queue mask and
from the KFD compute pool so that neither MES firmware nor KFD ever maps
another context onto it. KFD derives its VMID range from the shared
compute_vmid_bitmap via ffs()/fls(), so clearing the bit there is
sufficient and needs no change inside the KFD subsystem.
The field defaults to 0 (unused), so this is a no-op until a generation
opts in by setting spm_vmid.
Signed-off-by: Sunil Khatri<[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 4 ++++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index afcfb92fb9f5f..71e47bdf11393 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -207,6 +207,10 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
for (i = last_valid_bit; i < AMDGPU_MAX_QUEUES; ++i)
clear_bit(i, gpu_resources.cp_queue_bitmap);
+ if (adev->vm_manager.spm_vmid)
+ gpu_resources.compute_vmid_bitmap &=
+ ~BIT(adev->vm_manager.spm_vmid);
+
That is quite a mess.
I dint get that part clearly, i am just taking the bit 15th off the
bitmap... Any inputs here ?
amdgpu_doorbell_get_kfd_info(adev,
&gpu_resources.doorbell_physical_address,
&gpu_resources.doorbell_aperture_size,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 22ecb70fec2cd..afb56a2f9672b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -134,6 +134,9 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
adev->mes.vmid_mask_mmhub = 0xFF00;
adev->mes.vmid_mask_gfxhub = total_vmid_mask & ~reserved_vmid_mask;
+ if (adev->vm_manager.spm_vmid)
+ adev->mes.vmid_mask_gfxhub &= ~BIT(adev->vm_manager.spm_vmid);
Please remove the vmid_mask_gfxhub field from the MES structure if possible and move
all of that into adev->vm_manager or adev->vm_manager.id_mgr instead.
you mean both
uint32_t vmid_mask_gfxhub;
uint32_t vmid_mask_mmhub;
To be out from mes structure and move to adev->vm_manager->id_mgr[i].
The reason I think they are part of the mes as they are only use in the
mes related files even if they are vm related fields. Whats your suggestion?
Regards,
Christian.
+
num_pipes = adev->gfx.me.num_pipe_per_me * adev->gfx.me.num_me;
if (num_pipes > AMDGPU_MES_MAX_GFX_PIPES)
dev_warn(adev->dev, "more gfx pipes than supported by MES! (%d vs
%d)\n",
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 0f6634b749746..57070da337750 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -414,6 +414,8 @@ struct amdgpu_vm_manager {
/* Global registration of recent page fault information */
struct amdgpu_vm_fault_info fault_info;
unsigned int npa_vmid;
+ /* VMID reserved for SPM, 0 if unused */
+ unsigned int spm_vmid;
};
struct amdgpu_bo_va_mapping;