AMD General Hi @Lazar, Lijo,
Could you please help to review the patch Chi provided? You can contact Chi directly if you have any questions, thanks. Best Regards, Celine Zhang -----Original Message----- From: Hong, Chi <[email protected]> Sent: Tuesday, September 29, 2026 3:25 PM To: Hong, Chi <[email protected]>; [email protected] Cc: Lazar, Lijo <[email protected]>; Zhang, Hawking <[email protected]>; Zhang, Tiantian (Celine) <[email protected]> Subject: RE: [PATCH] drm/amd/ras: skip RAS TA firmware reload on resume for SR-IOV VFs AMD General Ping -----Original Message----- From: Chi Hong <[email protected]> Sent: Monday, September 28, 2026 2:12 PM To: [email protected] Cc: Hong, Chi <[email protected]> Subject: [PATCH] drm/amd/ras: skip RAS TA firmware reload on resume for SR-IOV VFs SR-IOV VFs use amdgpu_virt_ras_hw_init() which skips ras_core_hw_init(), leaving fw_gpu_mem unallocated. ras_psp_reload_firmwares() then hits the NULL buffer and returns -ENOMEM (-12) for every VF on resume, aborting ip_resume_phase2 before amdgpu_fence_driver_hw_init() runs. The next hibernate double-puts IRQ refcounts causing a WARN storm. Skip the reload for VFs - there is nothing local to reload. The post-reset path (amdgpu_ras_mgr_resume_after_reset) is unaffected. Fixes: 5e5be56a5b76 ("drm/amdgpu/ras: reload RAS TA from ras mgr resume") Signed-off-by: Chi Hong <[email protected]> --- drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c index a02167397ce2..5bac792554f5 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c @@ -529,6 +529,9 @@ static int amdgpu_ras_mgr_resume(struct amdgpu_ip_block *ip_block) if (!ras_mgr->ras_is_ready) return 0; + if (amdgpu_sriov_vf(adev)) + return 0; + ret = ras_psp_reload_firmwares(ras_mgr->ras_core, 0); if (ret) RAS_DEV_ERR(adev, -- 2.43.0
