Hi,
 
This series adds second-level trap handler support for render-node user
queues and kernel-managed VMIDs.
 
The first-level trap state is associated with the GPUVM because the TBA
and TMA are mappings in that GPU virtual address space. User queues and
kernel queues using the same GPUVM therefore use the same first-level
trap state.
 
User queues get their first-level TBA/TMA through MES/KIQ. For
kernel-managed VMIDs, the required trap registers are programmed from
the gfxhub setup path.
 
SET_L2_TRAP and CLEAR_L2_TRAP are exposed through the VM ioctl. Before
changing the second-level trap descriptor, the driver waits for
outstanding work tracked by the GPUVM reservation. The VM root remains
reserved while the mappings are checked and the descriptor is updated,
so the queues cannot be resumed in the middle of the update.
 
Userspace must keep the second-level TBA and TMA mappings valid after
SET_L2_TRAP and may remove them after CLEAR_L2_TRAP completes
successfully.
 
Changes in v3:
- Use the existing GPUVM eviction fence instead of explicitly evicting
  and restoring user queues for SET/CLEAR.
- Keep the VM locked while checking the mappings and updating the L2
  trap addresses, so queues cannot resume during the update.
- Remove the amdgpu_userq_restore_all() export since the trap path no
  longer needs it.
- Remove the remaining old TRAP ioctl UAPI definitions.
- Fix the cleanup when trap allocation fails and the ordering when the
  trap state is freed during VM teardown.
- Keep the separate reserved VA range for the first-level trap mapping.
- Add kernel VMID trap programming for gfxhub_v3_0_3.
- Mask the TBA/TMA address fields when programming the registers and
  keep the existing GFX11 TRAP_EN workaround.
- Handle the XCC mask when programming multi-XCC hardware and restore
  the VMID selector afterwards.
- Check the reserved fields in the VM ioctl input.
- Document that userspace must keep the second-level TBA/TMA mappings
  valid until CLEAR_L2_TRAP completes.
 
Only compilation and driver load tested.

Srinivasan Shanmugam (4):
  drm/amdgpu: Add second-level trap handler infrastructure
  drm/amdgpu: Make first-level trap state GPUVM-owned
  drm/amdgpu: Program trap TBA/TMA for kernel-managed VMIDs
  drm/amdgpu/uapi: Add SET/CLEAR L2 TRAP to VM ioctl

 drivers/gpu/drm/amd/amdgpu/amdgpu.h         |   2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c     |   1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c     |   9 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_trap.c    | 396 ++++++++++++--------
 drivers/gpu/drm/amd/amdgpu/amdgpu_trap.h    |  65 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c      |  60 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h      |   4 +
 drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c |  38 ++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c   |  38 ++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c   |  53 +++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c    |  38 ++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c    |  46 +++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c  |  46 +++
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c  |   7 +-
 include/uapi/drm/amdgpu_drm.h               |  88 +++--
 15 files changed, 686 insertions(+), 205 deletions(-)

-- 
2.34.1

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