On 10/12/26 11:24, Sunil Khatri wrote:
> The SPM (Streaming Performance Monitor) path needs a VMID that is
> isolated from other GPU contexts. Introduce vm_manager.spm_vmid to let
> a GFXHUB dedicate a VMID to SPM.
> 
> When spm_vmid is set, exclude it from both the kernel-queue pool and
> vmid_uq_mask_gfxhub, so neither the round-robin kernel-queue allocator
> nor MES/Userqueues ever maps another context onto it.
> 
> Assisted-by: Claude:claude-sonnet-5
> Signed-off-by: Sunil Khatri <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 46 ++++++++++++++++---------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h  |  2 ++
>  2 files changed, 31 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
> index 392a18b1f2b4b..ed1efde29a9a5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
> @@ -638,26 +638,45 @@ void amdgpu_vmid_reset_all(struct amdgpu_device *adev)
>   * @vmid_kq_mask_gfxhub: kernel-queue VMID pool mask for GFXHUB
>   * @vmid_kq_mask_mmhub: kernel-queue VMID pool mask for MMHUB
>   *
> - * Sets both hubs' kernel-queue VMID pools (tracked least-recently-used
> - * via id_mgr[].ids_lru), and both hubs' KFD/MES user-queue masks.
> - * vmid_uq_mask_gfxhub is set to the
> - * complement of @vmid_kq_mask_gfxhub, since unlike MMHUB's it is always a
> - * clean partition of the full VMID range; vmid_uq_mask_mmhub is the
> - * fixed pool set here instead, since MMHUB's kq and uq pools are
> - * allowed to overlap. A VMID dedicated to a single fixed purpose on
> - * MMHUB (npa_vmid) is excluded from both MMHUB pools; it is the
> - * caller's responsibility to have already set npa_vmid.
> + * Sets both GFXHUB and MMHUB kernel-queue VMID pools
> + * via id_mgr[].ids_lru, and KFD/MES user-queue masks too.
>   */
>  void amdgpu_vmid_mgr_set_vmid_mask(struct amdgpu_device *adev,
>                                  unsigned long vmid_kq_mask_gfxhub,
>                                  unsigned long vmid_kq_mask_mmhub)
>  {
> +     unsigned long uq_mask_gfxhub, uq_mask_mmhub;
>       unsigned int i;
>  
>       BUILD_BUG_ON(AMDGPU_NUM_VMID > BITS_PER_LONG);
>  
> -     if (adev->vm_manager.npa_vmid)
> +     /*
> +      * Derive the uq masks from the kq masks as given, then carve each
> +      * hub's dedicated out-of-pool VMID out of both of that hub's pools.
> +      */
> +     uq_mask_gfxhub = GENMASK(AMDGPU_NUM_VMID - 1, 1) & ~vmid_kq_mask_gfxhub;
> +     uq_mask_mmhub = 0xFF00;

That looks like it was derived from the original first_kfd_vmid or some fixed 
MES value.

For now the patch is Reviewed-by: Christian König <[email protected]>, 
but I think we need to take a look at that value again.

Regards,
Christian.

> +
> +     /*
> +      * SPM uses a dedicated vmid that is reserved from gfxhub.
> +      * Unmask the reserved vmids from both user and kernel queues
> +      */
> +     if (adev->vm_manager.spm_vmid) {
> +             vmid_kq_mask_gfxhub &= ~BIT(adev->vm_manager.spm_vmid);
> +             uq_mask_gfxhub &= ~BIT(adev->vm_manager.spm_vmid);
> +     }
> +
> +     /*
> +      * NPA uses a dedicated vmid that is reserved from mmhub.
> +      * Unmask the reserved VMIDs from both user and kernel queues
> +      */
> +     if (adev->vm_manager.npa_vmid) {
>               vmid_kq_mask_mmhub &= ~BIT(adev->vm_manager.npa_vmid);
> +             uq_mask_mmhub &= ~BIT(adev->vm_manager.npa_vmid);
> +     }
> +
> +     adev->vm_manager.vmid_uq_mask_gfxhub = uq_mask_gfxhub;
> +     adev->vm_manager.vmid_uq_mask_mmhub = uq_mask_mmhub;
>  
>       for (i = 0; i < AMDGPU_MAX_VMHUBS; i++) {
>               bool is_mmhub = AMDGPU_IS_MMHUB0(i) || AMDGPU_IS_MMHUB1(i);
> @@ -666,13 +685,6 @@ void amdgpu_vmid_mgr_set_vmid_mask(struct amdgpu_device 
> *adev,
>                           is_mmhub ? &vmid_kq_mask_mmhub : 
> &vmid_kq_mask_gfxhub,
>                           AMDGPU_NUM_VMID);
>       }
> -
> -     adev->vm_manager.vmid_uq_mask_gfxhub =
> -             GENMASK(AMDGPU_NUM_VMID - 1, 1) & ~vmid_kq_mask_gfxhub;
> -
> -     adev->vm_manager.vmid_uq_mask_mmhub = 0xFF00;
> -     if (adev->vm_manager.npa_vmid)
> -             adev->vm_manager.vmid_uq_mask_mmhub &= 
> ~BIT(adev->vm_manager.npa_vmid);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index d99e42ca308ef..ddcdc7256ef07 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -411,7 +411,9 @@ struct amdgpu_vm_manager {
>  
>       /* Global registration of recent page fault information */
>       struct amdgpu_vm_fault_info             fault_info;
> +     /* VMIDs dedicated to a single fixed purpose, 0 if unused */
>       unsigned int                            npa_vmid;
> +     unsigned int                            spm_vmid;
>  
>       /* VMID masks for GFXHUB and MMHUB */
>       uint32_t                                vmid_uq_mask_gfxhub;

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